The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/sound/cs35l33.txt

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    1 CS35L33 Speaker Amplifier
    2 
    3 Required properties:
    4 
    5   - compatible : "cirrus,cs35l33"
    6 
    7   - reg : the I2C address of the device for I2C
    8 
    9   - VA-supply, VP-supply : power supplies for the device,
   10     as covered in
   11     Documentation/devicetree/bindings/regulator/regulator.txt.
   12 
   13 Optional properties:
   14 
   15   - reset-gpios : gpio used to reset the amplifier
   16 
   17  -  interrupts : IRQ line info CS35L33.
   18     (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
   19     for further information relating to interrupt properties)
   20 
   21   - cirrus,boost-ctl : Booster voltage use to supply the amp. If the value is
   22     0, then VBST = VP. If greater than 0, the boost voltage will be 3300mV with
   23     a value of 1 and will increase at a step size of 100mV until a maximum of
   24     8000mV.
   25 
   26   - cirrus,ramp-rate : On power up, it affects the time from when the power
   27     up sequence begins to the time the audio reaches a full-scale output.
   28     On power down, it affects the time from when the power-down sequence
   29     begins to when the amplifier disables the PWM outputs. If this property
   30     is not set then soft ramping will be disabled and ramp time would be
   31     20ms. If this property is set to 0,1,2,3 then ramp times would be 40ms,
   32     60ms,100ms,175ms respectively for 48KHz sample rate.
   33 
   34   - cirrus,boost-ipk : The maximum current allowed for the boost converter.
   35     The range starts at 1850000uA and goes to a maximum of 3600000uA
   36     with a step size of 15625uA. The default is 2500000uA.
   37 
   38   - cirrus,imon-adc-scale : Configures the scaling of data bits from the IMON
   39     ADC data word. This property can be set as a value of 0 for bits 15 down
   40     to 0, 6 for 21 down to 6, 7, for 22 down to 7, 8 for 23 down to 8.
   41 
   42 
   43 Optional H/G Algorithm sub-node:
   44 
   45 The cs35l33 node can have a single "cirrus,hg-algo" sub-node that will enable
   46 the internal H/G Algorithm.
   47 
   48   - cirrus,hg-algo : Sub-node for internal Class H/G algorithm that
   49     controls the amplifier supplies.
   50 
   51 Optional properties for the "cirrus,hg-algo" sub-node:
   52 
   53   - cirrus,mem-depth : Memory depth for the Class H/G algorithm measured in
   54     LRCLK cycles. If this property is set to 0, 1, 2, or 3 then the memory
   55     depths will be 1, 4, 8, 16 LRCLK cycles.  The default is 16 LRCLK cycles.
   56 
   57     cirrus,release-rate : The number of consecutive LRCLK periods before
   58     allowing release condition tracking updates. The number of LRCLK periods
   59     start at 3 to a maximum of 255.
   60 
   61   - cirrus,ldo-thld : Configures the signal threshold at which the PWM output
   62     stage enters LDO operation. Starts as a default value of 50mV for a value
   63     of 1 and increases with a step size of 50mV to a maximum of 750mV (value of
   64     0xF).
   65 
   66   - cirrus,ldo-path-disable : This is a boolean property. If present, the H/G
   67     algorithm uses the max detection path.  If not present, the LDO
   68     detection path is used.
   69 
   70   - cirrus,ldo-entry-delay : The LDO entry delay in milliseconds before the H/G
   71     algorithm switches to the LDO voltage.  This property can be set to values
   72     from 0 to 7 for delays of 5ms, 10ms, 50ms, 100ms, 200ms, 500ms, 1000ms.
   73     The default is 100ms.
   74 
   75   - cirrus,vp-hg-auto : This is a boolean property.  When set, class H/G VPhg
   76     automatic updating is enabled.
   77 
   78   - cirrus,vp-hg :  Class H/G algorithm VPhg.  Controls the H/G algorithm's
   79     reference to the VP voltage for when to start generating a boosted VBST.
   80     The reference voltage starts at 3000mV with a value of 0x3 and is increased
   81     by 100mV per step to a maximum of 5500mV.
   82 
   83   - cirrus,vp-hg-rate : The rate (number of LRCLK periods) at which the VPhg is
   84     allowed to increase to a higher voltage when using VPhg automatic
   85     tracking. This property can be set to values from 0 to 3 with rates of 128
   86     periods, 2048 periods, 32768 periods, and 524288 periods.
   87     The default is 32768 periods.
   88 
   89   - cirrus,vp-hg-va : VA calculation reference for automatic VPhg tracking
   90     using VPMON. This property can be set to values from 0 to 6 starting at
   91     1800mV with a step size of 50mV up to a maximum value of 1750mV.
   92     Default is 1800mV.
   93 
   94 Example:
   95 
   96 cs35l33: cs35l33@40 {
   97         compatible = "cirrus,cs35l33";
   98         reg = <0x40>;
   99 
  100         VA-supply = <&ldo5_reg>;
  101         VP-supply = <&ldo5_reg>;
  102 
  103         interrupt-parent = <&gpio8>;
  104         interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
  105 
  106         reset-gpios = <&cs47l91 34 0>;
  107 
  108         cirrus,ramp-rate = <0x0>;
  109         cirrus,boost-ctl = <0x30>;  /* VBST = 8000mV */
  110         cirrus,boost-ipk = <0xE0>; /* 3600mA */
  111         cirrus,imon-adc-scale = <0> /* Bits 15 down to 0 */
  112 
  113         cirrus,hg-algo {
  114                 cirrus,mem-depth = <0x3>;
  115                 cirrus,release-rate = <0x3>;
  116                 cirrus,ldo-thld = <0x1>;
  117                 cirrus,ldo-path-disable = <0x0>;
  118                 cirrus,ldo-entry-delay=<0x4>;
  119                 cirrus,vp-hg-auto;
  120                 cirrus,vp-hg=<0xF>;
  121                 cirrus,vp-hg-rate=<0x2>;
  122                 cirrus,vp-hg-va=<0x0>;
  123         };
  124 };

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