fsl,easrc.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/sound/fsl,easrc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: NXP Asynchronous Sample Rate Converter (ASRC) Controller
    8 
    9 maintainers:
   10   - Shengjiu Wang <shengjiu.wang@nxp.com>
   11 
   12 properties:
   13   $nodename:
   14     pattern: "^easrc@.*"
   15 
   16   compatible:
   17     const: fsl,imx8mn-easrc
   18 
   19   reg:
   20     maxItems: 1
   21 
   22   interrupts:
   23     maxItems: 1
   24 
   25   clocks:
   26     items:
   27       - description: Peripheral clock
   28 
   29   clock-names:
   30     items:
   31       - const: mem
   32 
   33   dmas:
   34     maxItems: 8
   35 
   36   dma-names:
   37     items:
   38       - const: ctx0_rx
   39       - const: ctx0_tx
   40       - const: ctx1_rx
   41       - const: ctx1_tx
   42       - const: ctx2_rx
   43       - const: ctx2_tx
   44       - const: ctx3_rx
   45       - const: ctx3_tx
   46 
   47   firmware-name:
   48     $ref: /schemas/types.yaml#/definitions/string
   49     const: imx/easrc/easrc-imx8mn.bin
   50     description: The coefficient table for the filters
   51 
   52   fsl,asrc-rate:
   53     $ref: /schemas/types.yaml#/definitions/uint32
   54     minimum: 8000
   55     maximum: 192000
   56     description: Defines a mutual sample rate used by DPCM Back Ends
   57 
   58   fsl,asrc-format:
   59     $ref: /schemas/types.yaml#/definitions/uint32
   60     enum: [2, 6, 10, 32, 36]
   61     default: 2
   62     description:
   63       Defines a mutual sample format used by DPCM Back Ends
   64 
   65 required:
   66   - compatible
   67   - reg
   68   - interrupts
   69   - clocks
   70   - clock-names
   71   - dmas
   72   - dma-names
   73   - firmware-name
   74   - fsl,asrc-rate
   75   - fsl,asrc-format
   76 
   77 additionalProperties: false
   78 
   79 examples:
   80   - |
   81     #include <dt-bindings/clock/imx8mn-clock.h>
   82 
   83     easrc: easrc@300c0000 {
   84            compatible = "fsl,imx8mn-easrc";
   85            reg = <0x300c0000 0x10000>;
   86            interrupts = <0x0 122 0x4>;
   87            clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
   88            clock-names = "mem";
   89            dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
   90                   <&sdma2 18 23 0> , <&sdma2 19 23 0>,
   91                   <&sdma2 20 23 0> , <&sdma2 21 23 0>,
   92                   <&sdma2 22 23 0> , <&sdma2 23 23 0>;
   93            dma-names = "ctx0_rx", "ctx0_tx",
   94                        "ctx1_rx", "ctx1_tx",
   95                        "ctx2_rx", "ctx2_tx",
   96                        "ctx3_rx", "ctx3_tx";
   97            firmware-name = "imx/easrc/easrc-imx8mn.bin";
   98            fsl,asrc-rate  = <8000>;
   99            fsl,asrc-format = <2>;
  100     };

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