1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/sound/microchip,pdmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Microchip Pulse Density Microphone Controller
8
9 maintainers:
10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
11
12 description:
13 The Microchip Pulse Density Microphone Controller (PDMC) interfaces up to 4
14 digital microphones having Pulse Density Modulated (PDM) outputs.
15
16 properties:
17 compatible:
18 const: microchip,sama7g5-pdmc
19
20 reg:
21 maxItems: 1
22
23 "#sound-dai-cells":
24 const: 0
25
26 interrupts:
27 maxItems: 1
28
29 clocks:
30 items:
31 - description: Peripheral Bus Clock
32 - description: Generic Clock
33
34 clock-names:
35 items:
36 - const: pclk
37 - const: gclk
38
39 dmas:
40 description: RX DMA Channel
41 maxItems: 1
42
43 dma-names:
44 const: rx
45
46 microchip,mic-pos:
47 description: |
48 Position of PDM microphones on the DS line and the sampling edge (rising
49 or falling) of the CLK line. A microphone is represented as a pair of DS
50 line and the sampling edge. The first microphone is mapped to channel 0,
51 the second to channel 1, etc.
52 $ref: /schemas/types.yaml#/definitions/uint32-matrix
53 items:
54 items:
55 - description: value for DS line
56 - description: value for sampling edge
57 anyOf:
58 - enum:
59 - [0, 0]
60 - [0, 1]
61 - [1, 0]
62 - [1, 1]
63 minItems: 1
64 maxItems: 4
65 uniqueItems: true
66
67 required:
68 - compatible
69 - reg
70 - "#sound-dai-cells"
71 - interrupts
72 - clocks
73 - clock-names
74 - dmas
75 - dma-names
76 - microchip,mic-pos
77
78 additionalProperties: false
79
80 examples:
81 - |
82 #include <dt-bindings/clock/at91.h>
83 #include <dt-bindings/dma/at91.h>
84 #include <dt-bindings/interrupt-controller/arm-gic.h>
85 #include <dt-bindings/sound/microchip,pdmc.h>
86
87 pdmc: sound@e1608000 {
88 compatible = "microchip,sama7g5-pdmc";
89 reg = <0xe1608000 0x4000>;
90 #sound-dai-cells = <0>;
91 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
92 dmas = <&dma0 AT91_XDMAC_DT_PERID(37)>;
93 dma-names = "rx";
94 clocks = <&pmc PMC_TYPE_PERIPHERAL 68>, <&pmc PMC_TYPE_GCK 68>;
95 clock-names = "pclk", "gclk";
96 microchip,mic-pos = <MCHP_PDMC_DS0 MCHP_PDMC_CLK_POSITIVE>,
97 <MCHP_PDMC_DS0 MCHP_PDMC_CLK_NEGATIVE>,
98 <MCHP_PDMC_DS1 MCHP_PDMC_CLK_POSITIVE>,
99 <MCHP_PDMC_DS1 MCHP_PDMC_CLK_NEGATIVE>;
100 };
Cache object: 40736f51d52f44bb75311bda0df191eb
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