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     1 # SPDX-License-Identifier: GPL-2.0
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/sound/renesas,fsi.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Renesas FIFO-buffered Serial Interface (FSI)
    8 
    9 maintainers:
   10   - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   11 
   12 properties:
   13   $nodename:
   14     pattern: "^sound@.*"
   15 
   16   compatible:
   17     oneOf:
   18       # for FSI2 SoC
   19       - items:
   20           - enum:
   21               - renesas,fsi2-sh73a0  # SH-Mobile AG5
   22               - renesas,fsi2-r8a7740 # R-Mobile A1
   23           - enum:
   24               - renesas,sh_fsi2
   25       # for Generic
   26       - items:
   27           - enum:
   28               - renesas,sh_fsi
   29               - renesas,sh_fsi2
   30 
   31   reg:
   32     maxItems: 1
   33 
   34   interrupts:
   35     maxItems: 1
   36 
   37   clocks:
   38     maxItems: 1
   39 
   40   power-domains:
   41     maxItems: 1
   42 
   43   '#sound-dai-cells':
   44     const: 1
   45 
   46 patternProperties:
   47   "^fsi(a|b),spdif-connection$":
   48     $ref: /schemas/types.yaml#/definitions/flag
   49     description: FSI is connected by S/PDIF
   50 
   51   "^fsi(a|b),stream-mode-support$":
   52     $ref: /schemas/types.yaml#/definitions/flag
   53     description: FSI supports 16bit stream mode
   54 
   55   "^fsi(a|b),use-internal-clock$":
   56     $ref: /schemas/types.yaml#/definitions/flag
   57     description: FSI uses internal clock when master mode
   58 
   59 required:
   60   - compatible
   61   - reg
   62   - interrupts
   63   - clocks
   64   - power-domains
   65   - '#sound-dai-cells'
   66 
   67 additionalProperties: false
   68 
   69 examples:
   70   - |
   71     #include <dt-bindings/clock/r8a7740-clock.h>
   72     #include <dt-bindings/interrupt-controller/arm-gic.h>
   73     sh_fsi2: sound@fe1f0000 {
   74             compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
   75             reg = <0xfe1f0000 0x400>;
   76             interrupts = <GIC_SPI 9 0x4>;
   77             clocks = <&mstp3_clks R8A7740_CLK_FSI>;
   78             power-domains = <&pd_a4mp>;
   79 
   80             #sound-dai-cells = <1>;
   81             fsia,spdif-connection;
   82             fsia,stream-mode-support;
   83             fsia,use-internal-clock;
   84     };
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