sgtl5000.yaml

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    1 # SPDX-License-Identifier: GPL-2.0-only
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/sound/sgtl5000.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Freescale SGTL5000 Stereo Codec
    8 
    9 maintainers:
   10   - Fabio Estevam <festevam@gmail.com>
   11 
   12 properties:
   13   compatible:
   14     const: fsl,sgtl5000
   15 
   16   reg:
   17     maxItems: 1
   18 
   19   "#sound-dai-cells":
   20     const: 0
   21 
   22   assigned-clock-parents: true
   23   assigned-clock-rates: true
   24   assigned-clocks: true
   25 
   26   clocks:
   27     items:
   28       - description: the clock provider of SYS_MCLK
   29 
   30   VDDA-supply:
   31     description: the regulator provider of VDDA
   32 
   33   VDDIO-supply:
   34     description: the regulator provider of VDDIO
   35 
   36   VDDD-supply:
   37     description: the regulator provider of VDDD
   38 
   39   micbias-resistor-k-ohms:
   40     description: The bias resistor to be used in kOhms. The resistor can take
   41       values of 2k, 4k or 8k. If set to 0 it will be off. If this node is not
   42       mentioned or if the value is unknown, then micbias resistor is set to
   43       4k.
   44     enum: [ 0, 2, 4, 8 ]
   45 
   46   micbias-voltage-m-volts:
   47     description: The bias voltage to be used in mVolts. The voltage can take
   48       values from 1.25V to 3V by 250mV steps. If this node is not mentioned
   49       or the value is unknown, then the value is set to 1.25V.
   50     $ref: "/schemas/types.yaml#/definitions/uint32"
   51     enum: [ 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000 ]
   52 
   53   lrclk-strength:
   54     description: |
   55       The LRCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
   56       table below:
   57 
   58         VDDIO           1.8V            2.5V            3.3V
   59         0 =             Disable
   60         1 =             1.66 mA         2.87 mA         4.02  mA
   61         2 =             3.33 mA         5.74 mA         8.03  mA
   62         3 =             4.99 mA         8.61 mA         12.05 mA
   63     $ref: "/schemas/types.yaml#/definitions/uint32"
   64     enum: [ 0, 1, 2, 3 ]
   65 
   66   sclk-strength:
   67     description: |
   68       The SCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
   69       table below:
   70 
   71         VDDIO           1.8V            2.5V            3.3V
   72         0 =             Disable
   73         1 =             1.66 mA         2.87 mA         4.02  mA
   74         2 =             3.33 mA         5.74 mA         8.03  mA
   75         3 =             4.99 mA         8.61 mA         12.05 mA
   76     $ref: "/schemas/types.yaml#/definitions/uint32"
   77     enum: [ 0, 1, 2, 3 ]
   78 
   79   port:
   80     $ref: audio-graph-port.yaml#
   81     unevaluatedProperties: false
   82 
   83 required:
   84   - compatible
   85   - reg
   86   - "#sound-dai-cells"
   87   - clocks
   88   - VDDA-supply
   89   - VDDIO-supply
   90 
   91 additionalProperties: false
   92 
   93 examples:
   94   - |
   95     i2c {
   96         #address-cells = <1>;
   97         #size-cells = <0>;
   98 
   99         codec@a {
  100             compatible = "fsl,sgtl5000";
  101             reg = <0x0a>;
  102             #sound-dai-cells = <0>;
  103             clocks = <&clks 150>;
  104             micbias-resistor-k-ohms = <2>;
  105             micbias-voltage-m-volts = <2250>;
  106             VDDA-supply = <&reg_3p3v>;
  107             VDDIO-supply = <&reg_3p3v>;
  108         };
  109     };
  110 ...

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sys/contrib/device-tree/Bindings/sound/sgtl5000.yaml