ti,tlv320adc3xxx.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/sound/ti,tlv320adc3xxx.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Texas Instruments TLV320ADC3001/TLV320ADC3101 Stereo ADC
    8 
    9 maintainers:
   10   - Ricard Wanderlof <ricardw@axis.com>
   11 
   12 description: |
   13   Texas Instruments TLV320ADC3001 and TLV320ADC3101 Stereo ADC
   14   https://www.ti.com/product/TLV320ADC3001
   15   https://www.ti.com/product/TLV320ADC3101
   16 
   17 properties:
   18   compatible:
   19     enum:
   20       - ti,tlv320adc3001
   21       - ti,tlv320adc3101
   22 
   23   reg:
   24     maxItems: 1
   25     description: I2C address
   26 
   27   '#sound-dai-cells':
   28     const: 0
   29 
   30   '#gpio-cells':
   31     const: 2
   32 
   33   gpio-controller: true
   34 
   35   reset-gpios:
   36     maxItems: 1
   37     description: GPIO pin used for codec reset (RESET pin)
   38 
   39   clocks:
   40     maxItems: 1
   41     description: Master clock (MCLK)
   42 
   43   ti,dmdin-gpio1:
   44     $ref: /schemas/types.yaml#/definitions/uint32
   45     enum:
   46       - 0 # ADC3XXX_GPIO_DISABLED       - I/O buffers powered down and not used
   47       - 1 # ADC3XXX_GPIO_INPUT          - Various non-GPIO input functions
   48       - 2 # ADC3XXX_GPIO_GPI            - General purpose input
   49       - 3 # ADC3XXX_GPIO_GPO            - General purpose output
   50       - 4 # ADC3XXX_GPIO_CLKOUT         - Clock source set in CLKOUT_MUX reg
   51       - 5 # ADC3XXX_GPIO_INT1           - INT1 output
   52       - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK
   53       - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
   54     default: 0
   55     description: |
   56       Configuration for DMDIN/GPIO1 pin.
   57 
   58       When ADC3XXX_GPIO_GPO is configured, this causes corresponding the
   59       ALSA control "GPIOx Output" to appear, as a switch control.
   60 
   61   ti,dmclk-gpio2:
   62     $ref: /schemas/types.yaml#/definitions/uint32
   63     enum:
   64       - 0 # ADC3XXX_GPIO_DISABLED       - I/O buffers powered down and not used
   65       - 1 # ADC3XXX_GPIO_INPUT          - Various non-GPIO input functions
   66       - 2 # ADC3XXX_GPIO_GPI            - General purpose input
   67       - 3 # ADC3XXX_GPIO_GPO            - General purpose output
   68       - 4 # ADC3XXX_GPIO_CLKOUT         - Clock source set in CLKOUT_MUX reg
   69       - 5 # ADC3XXX_GPIO_INT1           - INT1 output
   70       - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK
   71       - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
   72     default: 0
   73     description: |
   74       Configuration for DMCLK/GPIO2 pin.
   75 
   76       When ADC3XXX_GPIO_GPO is configured, this causes corresponding the
   77       ALSA control "GPIOx Output" to appear, as a switch control.
   78 
   79       Note that there is currently no support for reading the GPIO pins as
   80       inputs.
   81 
   82   ti,micbias1-vg:
   83     $ref: /schemas/types.yaml#/definitions/uint32
   84     enum:
   85       - 0 # ADC3XXX_MICBIAS_OFF         - Mic bias is powered down
   86       - 1 # ADC3XXX_MICBIAS_2_0V        - Mic bias is set to 2.0V
   87       - 2 # ADC3XXX_MICBIAS_2_5V        - Mic bias is set to 2.5V
   88       - 3 # ADC3XXX_MICBIAS_AVDD        - Mic bias is same as AVDD supply
   89     default: 0
   90     description: |
   91       Mic bias voltage output on MICBIAS1 pin
   92 
   93   ti,micbias2-vg:
   94     $ref: /schemas/types.yaml#/definitions/uint32
   95     enum:
   96       - 0 # ADC3XXX_MICBIAS_OFF         - Mic bias is powered down
   97       - 1 # ADC3XXX_MICBIAS_2_0V        - Mic bias is set to 2.0V
   98       - 2 # ADC3XXX_MICBIAS_2_5V        - Mic bias is set to 2.5V
   99       - 3 # ADC3XXX_MICBIAS_AVDD        - Mic bias is same as AVDD supply
  100     default: 0
  101     description: |
  102       Mic bias voltage output on MICBIAS2 pin
  103 
  104 required:
  105   - compatible
  106   - reg
  107   - clocks
  108 
  109 additionalProperties: false
  110 
  111 examples:
  112   - |
  113 
  114     #include <dt-bindings/gpio/gpio.h>
  115     #include <dt-bindings/sound/tlv320adc3xxx.h>
  116 
  117     i2c {
  118         #address-cells = <1>;
  119         #size-cells = <0>;
  120         tlv320adc3101: audio-codec@18 {
  121             compatible = "ti,tlv320adc3101";
  122             reg = <0x18>;
  123             reset-gpios = <&gpio_pc 3 GPIO_ACTIVE_LOW>;
  124             clocks = <&audio_mclk>;
  125             gpio-controller;
  126             #gpio-cells = <2>;
  127             ti,dmdin-gpio1 = <ADC3XXX_GPIO_GPO>;
  128             ti,micbias1-vg = <ADC3XXX_MICBIAS_AVDD>;
  129         };
  130     };
  131 
  132     audio_mclk: clock {
  133         compatible = "fixed-clock";
  134         #clock-cells = <0>;
  135         clock-frequency = <24576000>;
  136     };
  137 ...

Cache object: 232acd08a9f1007451e174386ecd8265

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sys/contrib/device-tree/Bindings/sound/ti,tlv320adc3xxx.yaml