1 * Freescale (Enhanced) Configurable Serial Peripheral Interface
2 (CSPI/eCSPI) for i.MX
3
4 Required properties:
5 - compatible :
6 - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
7 - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
8 - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
9 - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
10 - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
11 - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
12 - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
13 - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8MQ
14 - "fsl,imx8mm-ecspi" for SPI compatible with the one integrated on i.MX8MM
15 - "fsl,imx8mn-ecspi" for SPI compatible with the one integrated on i.MX8MN
16 - "fsl,imx8mp-ecspi" for SPI compatible with the one integrated on i.MX8MP
17 - reg : Offset and length of the register set for the device
18 - interrupts : Should contain CSPI/eCSPI interrupt
19 - clocks : Clock specifiers for both ipg and per clocks.
20 - clock-names : Clock names should include both "ipg" and "per"
21 See the clock consumer binding,
22 Documentation/devicetree/bindings/clock/clock-bindings.txt
23
24 Recommended properties:
25 - cs-gpios : GPIOs to use as chip selects, see spi-bus.txt. While the native chip
26 select lines can be used, they appear to always generate a pulse between each
27 word of a transfer. Most use cases will require GPIO based chip selects to
28 generate a valid transaction.
29
30 Optional properties:
31 - num-cs : Number of total chip selects, see spi-bus.txt.
32 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
33 Documentation/devicetree/bindings/dma/dma.txt.
34 - dma-names: DMA request names, if present, should include "tx" and "rx".
35 - fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register
36 controlling the SPI_READY handling. Note that to enable the DRCTL consideration,
37 the SPI_READY mode-flag needs to be set too.
38 Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
39
40 Obsolete properties:
41 - fsl,spi-num-chipselects : Contains the number of the chipselect
42
43 Example:
44
45 ecspi@70010000 {
46 #address-cells = <1>;
47 #size-cells = <0>;
48 compatible = "fsl,imx51-ecspi";
49 reg = <0x70010000 0x4000>;
50 interrupts = <36>;
51 cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */
52 <&gpio3 25 0>; /* GPIO3_25 */
53 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
54 dma-names = "rx", "tx";
55 fsl,spi-rdy-drctl = <1>;
56 };
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