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     1 Microchip PIC32 SPI Master controller
    2 
    3 Required properties:
    4 - compatible: Should be "microchip,pic32mzda-spi".
    5 - reg: Address and length of register space for the device.
    6 - interrupts: Should contain all three spi interrupts in sequence
    7               of <fault-irq>, <receive-irq>, <transmit-irq>.
    8 - interrupt-names: Should be "fault", "rx", "tx" in order.
    9 - clocks: Phandle of the clock generating SPI clock on the bus.
   10 - clock-names: Should be "mck0".
   11 - cs-gpios: Specifies the gpio pins to be used for chipselects.
   12             See: Documentation/devicetree/bindings/spi/spi-bus.txt
   13 
   14 Optional properties:
   15 - dmas: Two or more DMA channel specifiers following the convention outlined
   16         in Documentation/devicetree/bindings/dma/dma.txt
   17 - dma-names: Names for the dma channels. There must be at least one channel
   18              named "spi-tx" for transmit and named "spi-rx" for receive.
   19 
   20 Example:
   21 
   22 spi1: spi@1f821000 {
   23         compatible = "microchip,pic32mzda-spi";
   24         reg = <0x1f821000 0x200>;
   25         interrupts = <109 IRQ_TYPE_LEVEL_HIGH>,
   26                      <110 IRQ_TYPE_LEVEL_HIGH>,
   27                      <111 IRQ_TYPE_LEVEL_HIGH>;
   28         interrupt-names = "fault", "rx", "tx";
   29         clocks = <&PBCLK2>;
   30         clock-names = "mck0";
   31         cs-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
   32         dmas = <&dma 134>, <&dma 135>;
   33         dma-names = "spi-rx", "spi-tx";
   34 };
Cache object: 17398b7993c85522a6eb1c95b8c7ce07 
 
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