The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/spi/nuvoton,npcm-fiu.txt

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 * Nuvoton FLASH Interface Unit (FIU) SPI Controller
    2 
    3 NPCM FIU supports single, dual and quad communication interface.
    4 
    5 The NPCM7XX supports three FIU modules,
    6 FIU0 and FIUx supports two chip selects,
    7 FIU3 support four chip select.
    8 
    9 The NPCM8XX supports four FIU modules,
   10 FIU0 and FIUx supports two chip selects,
   11 FIU1 and FIU3 supports four chip selects.
   12 
   13 Required properties:
   14   - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC
   15                              "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC
   16   - #address-cells : should be 1.
   17   - #size-cells : should be 0.
   18   - reg : the first contains the register location and length,
   19           the second contains the memory mapping address and length
   20   - reg-names: Should contain the reg names "control" and "memory"
   21   - clocks : phandle of FIU reference clock.
   22 
   23 Required properties in case the pins can be muxed:
   24   - pinctrl-names : a pinctrl state named "default" must be defined.
   25   - pinctrl-0 : phandle referencing pin configuration of the device.
   26 
   27 Optional property:
   28   - nuvoton,spix-mode: enable spix-mode for an expansion bus to an ASIC or CPLD.
   29 
   30 Aliases:
   31 - All the FIU controller nodes should be represented in the aliases node using
   32   the following format 'fiu{n}' where n is a unique number for the alias.
   33   In the NPCM7XX BMC:
   34                 fiu0 represent fiu 0 controller
   35                 fiu1 represent fiu 3 controller
   36                 fiu2 represent fiu x controller
   37 
   38   In the NPCM8XX BMC:
   39                 fiu0 represent fiu 0 controller
   40                 fiu1 represent fiu 1 controller
   41                 fiu2 represent fiu 3 controller
   42                 fiu3 represent fiu x controller
   43 
   44 Example:
   45 fiu3: spi@c00000000 {
   46         compatible = "nuvoton,npcm750-fiu";
   47         #address-cells = <1>;
   48         #size-cells = <0>;
   49         reg = <0xfb000000 0x1000>, <0x80000000 0x10000000>;
   50         reg-names = "control", "memory";
   51         clocks = <&clk NPCM7XX_CLK_AHB>;
   52         pinctrl-names = "default";
   53         pinctrl-0 = <&spi3_pins>;
   54         spi-nor@0 {
   55                         ...
   56         };
   57 };
   58 

Cache object: 06813a7d17177bc82bb9133fd61e4e0d


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.