1 # SPDX-License-Identifier: GPL-2.0-only
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
8
9 maintainers:
10 - Mark Brown <broonie@kernel.org>
11
12 allOf:
13 - $ref: "spi-controller.yaml#"
14 - if:
15 properties:
16 compatible:
17 contains:
18 enum:
19 - mscc,ocelot-spi
20 - mscc,jaguar2-spi
21 then:
22 properties:
23 reg:
24 minItems: 2
25 - if:
26 properties:
27 compatible:
28 contains:
29 enum:
30 - baikal,bt1-sys-ssi
31 then:
32 properties:
33 mux-controls:
34 maxItems: 1
35 required:
36 - mux-controls
37 else:
38 required:
39 - interrupts
40
41 properties:
42 compatible:
43 oneOf:
44 - description: Generic DW SPI Controller
45 enum:
46 - snps,dw-apb-ssi
47 - snps,dwc-ssi-1.01a
48 - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
49 items:
50 - enum:
51 - mscc,ocelot-spi
52 - mscc,jaguar2-spi
53 - const: snps,dw-apb-ssi
54 - description: Microchip Sparx5 SoC SPI Controller
55 const: microchip,sparx5-spi
56 - description: Amazon Alpine SPI Controller
57 const: amazon,alpine-dw-apb-ssi
58 - description: Renesas RZ/N1 SPI Controller
59 items:
60 - const: renesas,rzn1-spi
61 - const: snps,dw-apb-ssi
62 - description: Intel Keem Bay SPI Controller
63 const: intel,keembay-ssi
64 - description: Intel Thunder Bay SPI Controller
65 const: intel,thunderbay-ssi
66 - description: Baikal-T1 SPI Controller
67 const: baikal,bt1-ssi
68 - description: Baikal-T1 System Boot SPI Controller
69 const: baikal,bt1-sys-ssi
70 - description: Canaan Kendryte K210 SoS SPI Controller
71 const: canaan,k210-spi
72 - description: Renesas RZ/N1 SPI Controller
73 items:
74 - enum:
75 - renesas,r9a06g032-spi # RZ/N1D
76 - renesas,r9a06g033-spi # RZ/N1S
77 - const: renesas,rzn1-spi # RZ/N1
78
79 reg:
80 minItems: 1
81 items:
82 - description: DW APB SSI controller memory mapped registers
83 - description: SPI MST region map or directly mapped SPI ROM
84
85 interrupts:
86 maxItems: 1
87
88 clocks:
89 minItems: 1
90 items:
91 - description: SPI Controller reference clock source
92 - description: APB interface clock source
93
94 clock-names:
95 minItems: 1
96 items:
97 - const: ssi_clk
98 - const: pclk
99
100 resets:
101 maxItems: 1
102
103 reset-names:
104 const: spi
105
106 reg-io-width:
107 $ref: /schemas/types.yaml#/definitions/uint32
108 description: I/O register width (in bytes) implemented by this device
109 default: 4
110 enum: [ 2, 4 ]
111
112 num-cs:
113 default: 4
114 minimum: 1
115 maximum: 4
116
117 dmas:
118 items:
119 - description: TX DMA Channel
120 - description: RX DMA Channel
121
122 dma-names:
123 items:
124 - const: tx
125 - const: rx
126
127 rx-sample-delay-ns:
128 default: 0
129 description: |
130 Default value of the rx-sample-delay-ns property.
131 This value will be used if the property is not explicitly defined
132 for a SPI slave device.
133
134 SPI Rx sample delay offset, unit is nanoseconds.
135 The delay from the default sample time before the actual sample of the
136 rxd input signal occurs. The "rx_sample_delay" is an optional feature
137 of the designware controller, and the upper limit is also subject to
138 controller configuration.
139
140 patternProperties:
141 "^.*@[0-9a-f]+$":
142 type: object
143 properties:
144 reg:
145 minimum: 0
146 maximum: 3
147
148 unevaluatedProperties: false
149
150 required:
151 - compatible
152 - reg
153 - "#address-cells"
154 - "#size-cells"
155 - clocks
156
157 examples:
158 - |
159 spi@fff00000 {
160 compatible = "snps,dw-apb-ssi";
161 reg = <0xfff00000 0x1000>;
162 #address-cells = <1>;
163 #size-cells = <0>;
164 interrupts = <0 154 4>;
165 clocks = <&spi_m_clk>;
166 num-cs = <2>;
167 cs-gpios = <&gpio0 13 0>,
168 <&gpio0 14 0>;
169 rx-sample-delay-ns = <3>;
170 flash@1 {
171 compatible = "spi-nand";
172 reg = <1>;
173 rx-sample-delay-ns = <7>;
174 };
175 };
176 - |
177 spi@1f040100 {
178 compatible = "baikal,bt1-sys-ssi";
179 reg = <0x1f040100 0x900>,
180 <0x1c000000 0x1000000>;
181 #address-cells = <1>;
182 #size-cells = <0>;
183 mux-controls = <&boot_mux>;
184 clocks = <&ccu_sys>;
185 clock-names = "ssi_clk";
186 };
187 ...
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