The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/spi/spi-nxp-fspi.txt

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    1 * NXP Flex Serial Peripheral Interface (FSPI)
    2 
    3 Required properties:
    4   - compatible : Should be "nxp,lx2160a-fspi"
    5                             "nxp,imx8qxp-fspi"
    6                             "nxp,imx8mm-fspi"
    7                             "nxp,imx8mp-fspi"
    8                             "nxp,imx8dxl-fspi"
    9 
   10   - reg :        First contains the register location and length,
   11                  Second contains the memory mapping address and length
   12   - reg-names :  Should contain the resource reg names:
   13                  - fspi_base: configuration register address space
   14                  - fspi_mmap: memory mapped address space
   15   - interrupts : Should contain the interrupt for the device
   16 
   17 Required SPI slave node properties:
   18   - reg :        There are two buses (A and B) with two chip selects each.
   19                  This encodes to which bus and CS the flash is connected:
   20                  - <0>: Bus A, CS 0
   21                  - <1>: Bus A, CS 1
   22                  - <2>: Bus B, CS 0
   23                  - <3>: Bus B, CS 1
   24 
   25 Example showing the usage of two SPI NOR slave devices on bus A:
   26 
   27 fspi0: spi@20c0000 {
   28         compatible = "nxp,lx2160a-fspi";
   29         reg = <0x0 0x20c0000 0x0 0x10000>, <0x0 0x20000000 0x0 0x10000000>;
   30         reg-names = "fspi_base", "fspi_mmap";
   31         interrupts = <0 25 0x4>; /* Level high type */
   32         clocks = <&clockgen 4 3>, <&clockgen 4 3>;
   33         clock-names = "fspi_en", "fspi";
   34 
   35         mt35xu512aba0: flash@0 {
   36                 reg = <0>;
   37                 ....
   38         };
   39 
   40         mt35xu512aba1: flash@1 {
   41                 reg = <1>;
   42                 ....
   43         };
   44 };

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