1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: ARM PL022 SPI controller
8
9 maintainers:
10 - Linus Walleij <linus.walleij@linaro.org>
11
12 allOf:
13 - $ref: "spi-controller.yaml#"
14
15 # We need a select here so we don't match all nodes with 'arm,primecell'
16 select:
17 properties:
18 compatible:
19 contains:
20 const: arm,pl022
21 required:
22 - compatible
23
24 properties:
25 compatible:
26 items:
27 - const: arm,pl022
28 - const: arm,primecell
29
30 reg:
31 maxItems: 1
32
33 interrupts:
34 maxItems: 1
35
36 clocks:
37 maxItems: 2
38
39 clock-names:
40 items:
41 - const: sspclk
42 - const: apb_pclk
43
44 pl022,autosuspend-delay:
45 description: delay in ms following transfer completion before the
46 runtime power management system suspends the device. A setting of 0
47 indicates no delay and the device will be suspended immediately.
48 $ref: "/schemas/types.yaml#/definitions/uint32"
49
50 pl022,rt:
51 description: indicates the controller should run the message pump with realtime
52 priority to minimise the transfer latency on the bus (boolean)
53 type: boolean
54
55 dmas:
56 description:
57 Two or more DMA channel specifiers following the convention outlined
58 in bindings/dma/dma.txt
59 minItems: 2
60 maxItems: 32
61
62 dma-names:
63 description:
64 There must be at least one channel named "tx" for transmit and named "rx"
65 for receive.
66 minItems: 2
67 maxItems: 32
68 additionalItems: true
69 items:
70 - const: rx
71 - const: tx
72
73 resets:
74 maxItems: 1
75
76 patternProperties:
77 "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$":
78 type: object
79 # SPI slave nodes must be children of the SPI master node and can
80 # contain the following properties.
81 properties:
82 pl022,interface:
83 description: SPI interface type
84 $ref: "/schemas/types.yaml#/definitions/uint32"
85 enum:
86 - 0 # SPI
87 - 1 # Texas Instruments Synchronous Serial Frame Format
88 - 2 # Microwire (Half Duplex)
89
90 pl022,com-mode:
91 description: Specifies the transfer mode
92 $ref: "/schemas/types.yaml#/definitions/uint32"
93 enum:
94 - 0 # interrupt mode
95 - 1 # polling mode
96 - 2 # DMA mode
97 default: 1
98
99 pl022,rx-level-trig:
100 description: Rx FIFO watermark level
101 $ref: "/schemas/types.yaml#/definitions/uint32"
102 minimum: 0
103 maximum: 4
104
105 pl022,tx-level-trig:
106 description: Tx FIFO watermark level
107 $ref: "/schemas/types.yaml#/definitions/uint32"
108 minimum: 0
109 maximum: 4
110
111 pl022,ctrl-len:
112 description: Microwire interface - Control length
113 $ref: "/schemas/types.yaml#/definitions/uint32"
114 minimum: 0x03
115 maximum: 0x1f
116
117 pl022,wait-state:
118 description: Microwire interface - Wait state
119 $ref: "/schemas/types.yaml#/definitions/uint32"
120 enum: [0, 1]
121
122 pl022,duplex:
123 description: Microwire interface - Full/Half duplex
124 $ref: "/schemas/types.yaml#/definitions/uint32"
125 enum: [0, 1]
126
127 required:
128 - compatible
129 - reg
130 - interrupts
131
132 unevaluatedProperties: false
133
134 examples:
135 - |
136 spi@e0100000 {
137 compatible = "arm,pl022", "arm,primecell";
138 reg = <0xe0100000 0x1000>;
139 #address-cells = <1>;
140 #size-cells = <0>;
141 interrupts = <0 31 0x4>;
142 dmas = <&dma_controller 23 1>,
143 <&dma_controller 24 0>;
144 dma-names = "rx", "tx";
145
146 flash@1 {
147 compatible = "st,m25p80";
148 reg = <1>;
149 spi-max-frequency = <12000000>;
150 spi-cpol;
151 spi-cpha;
152 pl022,interface = <0>;
153 pl022,com-mode = <0x2>;
154 pl022,rx-level-trig = <0>;
155 pl022,tx-level-trig = <0>;
156 pl022,ctrl-len = <0x11>;
157 pl022,wait-state = <0>;
158 pl022,duplex = <0>;
159 };
160 };
161 ...
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