spi-rockchip.yaml

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    1 # SPDX-License-Identifier: GPL-2.0
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Rockchip SPI Controller
    8 
    9 description:
   10   The Rockchip SPI controller is used to interface with various devices such
   11   as flash and display controllers using the SPI communication interface.
   12 
   13 allOf:
   14   - $ref: "spi-controller.yaml#"
   15 
   16 maintainers:
   17   - Heiko Stuebner <heiko@sntech.de>
   18 
   19 # Everything else is described in the common file
   20 properties:
   21   compatible:
   22     oneOf:
   23       - const: rockchip,rk3036-spi
   24       - const: rockchip,rk3066-spi
   25       - const: rockchip,rk3228-spi
   26       - const: rockchip,rv1108-spi
   27       - items:
   28           - enum:
   29               - rockchip,px30-spi
   30               - rockchip,rk3188-spi
   31               - rockchip,rk3288-spi
   32               - rockchip,rk3308-spi
   33               - rockchip,rk3328-spi
   34               - rockchip,rk3368-spi
   35               - rockchip,rk3399-spi
   36               - rockchip,rk3568-spi
   37               - rockchip,rv1126-spi
   38           - const: rockchip,rk3066-spi
   39 
   40   reg:
   41     maxItems: 1
   42 
   43   interrupts:
   44     maxItems: 1
   45 
   46   clocks:
   47     items:
   48       - description: transfer-clock
   49       - description: peripheral clock
   50 
   51   clock-names:
   52     items:
   53       - const: spiclk
   54       - const: apb_pclk
   55 
   56   dmas:
   57     items:
   58       - description: TX DMA Channel
   59       - description: RX DMA Channel
   60 
   61   dma-names:
   62     items:
   63       - const: tx
   64       - const: rx
   65 
   66   rx-sample-delay-ns:
   67     default: 0
   68     description:
   69       Nano seconds to delay after the SCLK edge before sampling Rx data
   70       (may need to be fine tuned for high capacitance lines).
   71       If not specified 0 will be used.
   72 
   73   pinctrl-names:
   74     minItems: 1
   75     items:
   76       - const: default
   77       - const: sleep
   78     description:
   79       Names for the pin configuration(s); may be "default" or "sleep",
   80       where the "sleep" configuration may describe the state
   81       the pins should be in during system suspend.
   82 
   83 required:
   84   - compatible
   85   - reg
   86   - interrupts
   87   - clocks
   88   - clock-names
   89 
   90 unevaluatedProperties: false
   91 
   92 examples:
   93   - |
   94     #include <dt-bindings/clock/rk3188-cru-common.h>
   95     #include <dt-bindings/interrupt-controller/arm-gic.h>
   96     #include <dt-bindings/interrupt-controller/irq.h>
   97     spi0: spi@ff110000 {
   98       compatible = "rockchip,rk3066-spi";
   99       reg = <0xff110000 0x1000>;
  100       interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
  101       clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
  102       clock-names = "spiclk", "apb_pclk";
  103       dmas = <&pdma1 11>, <&pdma1 12>;
  104       dma-names = "tx", "rx";
  105       pinctrl-0 = <&spi1_pins>;
  106       pinctrl-1 = <&spi1_sleep>;
  107       pinctrl-names = "default", "sleep";
  108       rx-sample-delay-ns = <10>;
  109       #address-cells = <1>;
  110       #size-cells = <0>;
  111     };

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sys/contrib/device-tree/Bindings/spi/spi-rockchip.yaml