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     1 Xilinx Zynq QSPI controller Device Tree Bindings
    2 -------------------------------------------------------------------
    3 
    4 Required properties:
    5 - compatible            : Should be "xlnx,zynq-qspi-1.0".
    6 - reg                   : Physical base address and size of QSPI registers map.
    7 - interrupts            : Property with a value describing the interrupt
    8                           number.
    9 - clock-names           : List of input clock names - "ref_clk", "pclk"
   10                           (See clock bindings for details).
   11 - clocks                : Clock phandles (see clock bindings for details).
   12 
   13 Optional properties:
   14 - num-cs                : Number of chip selects used.
   15 
   16 Example:
   17         qspi: spi@e000d000 {
   18                 compatible = "xlnx,zynq-qspi-1.0";
   19                 reg = <0xe000d000 0x1000>;
   20                 interrupt-parent = <&intc>;
   21                 interrupts = <0 19 4>;
   22                 clock-names = "ref_clk", "pclk";
   23                 clocks = <&clkc 10>, <&clkc 43>;
   24                 num-cs = <1>;
   25         };
Cache object: f3856ee65b6f106bdabc80a36bd9759f 
 
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