qcom,ocmem.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/sram/qcom,ocmem.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: On Chip Memory (OCMEM) that is present on some Qualcomm Snapdragon SoCs.
    8 
    9 maintainers:
   10   - Brian Masney <masneyb@onstation.org>
   11 
   12 description: |
   13   The On Chip Memory (OCMEM) is typically used by the GPU, camera/video, and
   14   audio components on some Snapdragon SoCs.
   15 
   16 properties:
   17   compatible:
   18     const: qcom,msm8974-ocmem
   19 
   20   reg:
   21     items:
   22       - description: Control registers
   23       - description: OCMEM address range
   24 
   25   reg-names:
   26     items:
   27       - const: ctrl
   28       - const: mem
   29 
   30   clocks:
   31     items:
   32       - description: Core clock
   33       - description: Interface clock
   34 
   35   clock-names:
   36     items:
   37       - const: core
   38       - const: iface
   39 
   40   '#address-cells':
   41     const: 1
   42 
   43   '#size-cells':
   44     const: 1
   45 
   46   ranges:
   47     maxItems: 1
   48 
   49 required:
   50   - compatible
   51   - reg
   52   - reg-names
   53   - clocks
   54   - clock-names
   55   - '#address-cells'
   56   - '#size-cells'
   57   - ranges
   58 
   59 additionalProperties: false
   60 
   61 patternProperties:
   62   "-sram@[0-9a-f]+$":
   63     type: object
   64     description: A region of reserved memory.
   65 
   66     properties:
   67       reg:
   68         maxItems: 1
   69 
   70     required:
   71       - reg
   72 
   73 examples:
   74   - |
   75     #include <dt-bindings/clock/qcom,rpmcc.h>
   76     #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
   77 
   78     sram@fdd00000 {
   79         compatible = "qcom,msm8974-ocmem";
   80 
   81         reg = <0xfdd00000 0x2000>,
   82               <0xfec00000 0x180000>;
   83         reg-names = "ctrl",
   84                     "mem";
   85 
   86         clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
   87                  <&mmcc OCMEMCX_OCMEMNOC_CLK>;
   88         clock-names = "core",
   89                       "iface";
   90 
   91         #address-cells = <1>;
   92         #size-cells = <1>;
   93         ranges = <0 0xfec00000 0x100000>;
   94 
   95         gmu-sram@0 {
   96             reg = <0x0 0x100000>;
   97         };
   98     };

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