exynos-usb.txt

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    1 Samsung Exynos SoC USB controller
    2 
    3 The USB devices interface with USB controllers on Exynos SOCs.
    4 The device node has following properties.
    5 
    6 EHCI
    7 Required properties:
    8  - compatible: should be "samsung,exynos4210-ehci" for USB 2.0
    9    EHCI controller in host mode.
   10  - reg: physical base address of the controller and length of memory mapped
   11    region.
   12  - interrupts: interrupt number to the cpu.
   13  - clocks: from common clock binding: handle to usb clock.
   14  - clock-names: from common clock binding: Shall be "usbhost".
   15  - phys: from the *Generic PHY* bindings; array specifying phy(s) used
   16    by the root port.
   17  - phy-names: from the *Generic PHY* bindings; array of the names for
   18    each phy for the root ports, must be a subset of the following:
   19    "host", "hsic0", "hsic1".
   20 
   21 Optional properties:
   22  - samsung,vbus-gpio:  if present, specifies the GPIO that
   23    needs to be pulled up for the bus to be powered.
   24 
   25 Example:
   26 
   27         usb@12110000 {
   28                 compatible = "samsung,exynos4210-ehci";
   29                 reg = <0x12110000 0x100>;
   30                 interrupts = <0 71 0>;
   31                 samsung,vbus-gpio = <&gpx2 6 1 3 3>;
   32 
   33                 clocks = <&clock 285>;
   34                 clock-names = "usbhost";
   35 
   36                 phys = <&usb2phy 1>;
   37                 phy-names = "host";
   38         };
   39 
   40 OHCI
   41 Required properties:
   42  - compatible: should be "samsung,exynos4210-ohci" for USB 2.0
   43    OHCI companion controller in host mode.
   44  - reg: physical base address of the controller and length of memory mapped
   45    region.
   46  - interrupts: interrupt number to the cpu.
   47  - clocks: from common clock binding: handle to usb clock.
   48  - clock-names: from common clock binding: Shall be "usbhost".
   49  - phys: from the *Generic PHY* bindings; array specifying phy(s) used
   50    by the root port.
   51  - phy-names: from the *Generic PHY* bindings; array of the names for
   52    each phy for the root ports, must be a subset of the following:
   53    "host", "hsic0", "hsic1".
   54 
   55 Example:
   56         usb@12120000 {
   57                 compatible = "samsung,exynos4210-ohci";
   58                 reg = <0x12120000 0x100>;
   59                 interrupts = <0 71 0>;
   60 
   61                 clocks = <&clock 285>;
   62                 clock-names = "usbhost";
   63 
   64                 phys = <&usb2phy 1>;
   65                 phy-names = "host";
   66         };
   67 
   68 DWC3
   69 Required properties:
   70  - compatible: should be one of the following -
   71                "samsung,exynos5250-dwusb3": for USB 3.0 DWC3 controller on
   72                                             Exynos5250/5420.
   73                "samsung,exynos5433-dwusb3": for USB 3.0 DWC3 controller on
   74                                             Exynos5433.
   75                "samsung,exynos7-dwusb3": for USB 3.0 DWC3 controller on Exynos7.
   76  - #address-cells, #size-cells : should be '1' if the device has sub-nodes
   77                                  with 'reg' property.
   78  - ranges: allows valid 1:1 translation between child's address space and
   79            parent's address space
   80  - clocks: Clock IDs array as required by the controller.
   81  - clock-names: Names of clocks corresponding to IDs in the clock property.
   82                 Following clock names shall be provided for different
   83                 compatibles:
   84                  - samsung,exynos5250-dwusb3: "usbdrd30",
   85                  - samsung,exynos5433-dwusb3: "aclk", "susp_clk", "pipe_pclk",
   86                                               "phyclk",
   87                  - samsung,exynos7-dwusb3: "usbdrd30", "usbdrd30_susp_clk",
   88                                            "usbdrd30_axius_clk"
   89  - vdd10-supply: 1.0V powr supply
   90  - vdd33-supply: 3.0V/3.3V power supply
   91 
   92 Sub-nodes:
   93 The dwc3 core should be added as subnode to Exynos dwc3 glue.
   94 - dwc3 :
   95    The binding details of dwc3 can be found in:
   96    Documentation/devicetree/bindings/usb/snps,dwc3.yaml
   97 
   98 Example:
   99         usb@12000000 {
  100                 compatible = "samsung,exynos5250-dwusb3";
  101                 clocks = <&clock 286>;
  102                 clock-names = "usbdrd30";
  103                 #address-cells = <1>;
  104                 #size-cells = <1>;
  105                 ranges;
  106                 vdd10-supply = <&ldo11_reg>;
  107                 vdd33-supply = <&ldo9_reg>;
  108 
  109                 dwc3 {
  110                         compatible = "synopsys,dwc3";
  111                         reg = <0x12000000 0x10000>;
  112                         interrupts = <0 72 0>;
  113                         usb-phy = <&usb2_phy &usb3_phy>;
  114                 };
  115         };

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sys/contrib/device-tree/Bindings/usb/exynos-usb.txt