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     1 /* SPDX-License-Identifier: GPL-2.0 */
    2 #ifndef __DT_BINDINGS_CLOCK_EFM32_CMU_H
    3 #define __DT_BINDINGS_CLOCK_EFM32_CMU_H
    4 
    5 #define clk_HFXO                0
    6 #define clk_HFRCO               1
    7 #define clk_LFXO                2
    8 #define clk_LFRCO               3
    9 #define clk_ULFRCO              4
   10 #define clk_AUXHFRCO            5
   11 #define clk_HFCLKNODIV          6
   12 #define clk_HFCLK               7
   13 #define clk_HFPERCLK            8
   14 #define clk_HFCORECLK           9
   15 #define clk_LFACLK              10
   16 #define clk_LFBCLK              11
   17 #define clk_WDOGCLK             12
   18 #define clk_HFCORECLKDMA        13
   19 #define clk_HFCORECLKAES        14
   20 #define clk_HFCORECLKUSBC       15
   21 #define clk_HFCORECLKUSB        16
   22 #define clk_HFCORECLKLE         17
   23 #define clk_HFCORECLKEBI        18
   24 #define clk_HFPERCLKUSART0      19
   25 #define clk_HFPERCLKUSART1      20
   26 #define clk_HFPERCLKUSART2      21
   27 #define clk_HFPERCLKUART0       22
   28 #define clk_HFPERCLKUART1       23
   29 #define clk_HFPERCLKTIMER0      24
   30 #define clk_HFPERCLKTIMER1      25
   31 #define clk_HFPERCLKTIMER2      26
   32 #define clk_HFPERCLKTIMER3      27
   33 #define clk_HFPERCLKACMP0       28
   34 #define clk_HFPERCLKACMP1       29
   35 #define clk_HFPERCLKI2C0        30
   36 #define clk_HFPERCLKI2C1        31
   37 #define clk_HFPERCLKGPIO        32
   38 #define clk_HFPERCLKVCMP        33
   39 #define clk_HFPERCLKPRS         34
   40 #define clk_HFPERCLKADC0        35
   41 #define clk_HFPERCLKDAC0        36
   42 
   43 #endif /* __DT_BINDINGS_CLOCK_EFM32_CMU_H */
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