The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/include/dt-bindings/clock/qcom,mmcc-msm8960.h

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    1 /* SPDX-License-Identifier: GPL-2.0-only */
    2 /*
    3  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
    4  */
    5 
    6 #ifndef _DT_BINDINGS_CLK_MSM_MMCC_8960_H
    7 #define _DT_BINDINGS_CLK_MSM_MMCC_8960_H
    8 
    9 #define MMSS_AHB_SRC                                    0
   10 #define FAB_AHB_CLK                                     1
   11 #define APU_AHB_CLK                                     2
   12 #define TV_ENC_AHB_CLK                                  3
   13 #define AMP_AHB_CLK                                     4
   14 #define DSI2_S_AHB_CLK                                  5
   15 #define JPEGD_AHB_CLK                                   6
   16 #define GFX2D0_AHB_CLK                                  7
   17 #define DSI_S_AHB_CLK                                   8
   18 #define DSI2_M_AHB_CLK                                  9
   19 #define VPE_AHB_CLK                                     10
   20 #define SMMU_AHB_CLK                                    11
   21 #define HDMI_M_AHB_CLK                                  12
   22 #define VFE_AHB_CLK                                     13
   23 #define ROT_AHB_CLK                                     14
   24 #define VCODEC_AHB_CLK                                  15
   25 #define MDP_AHB_CLK                                     16
   26 #define DSI_M_AHB_CLK                                   17
   27 #define CSI_AHB_CLK                                     18
   28 #define MMSS_IMEM_AHB_CLK                               19
   29 #define IJPEG_AHB_CLK                                   20
   30 #define HDMI_S_AHB_CLK                                  21
   31 #define GFX3D_AHB_CLK                                   22
   32 #define GFX2D1_AHB_CLK                                  23
   33 #define MMSS_FPB_CLK                                    24
   34 #define MMSS_AXI_SRC                                    25
   35 #define MMSS_FAB_CORE                                   26
   36 #define FAB_MSP_AXI_CLK                                 27
   37 #define JPEGD_AXI_CLK                                   28
   38 #define GMEM_AXI_CLK                                    29
   39 #define MDP_AXI_CLK                                     30
   40 #define MMSS_IMEM_AXI_CLK                               31
   41 #define IJPEG_AXI_CLK                                   32
   42 #define GFX3D_AXI_CLK                                   33
   43 #define VCODEC_AXI_CLK                                  34
   44 #define VFE_AXI_CLK                                     35
   45 #define VPE_AXI_CLK                                     36
   46 #define ROT_AXI_CLK                                     37
   47 #define VCODEC_AXI_A_CLK                                38
   48 #define VCODEC_AXI_B_CLK                                39
   49 #define MM_AXI_S3_FCLK                                  40
   50 #define MM_AXI_S2_FCLK                                  41
   51 #define MM_AXI_S1_FCLK                                  42
   52 #define MM_AXI_S0_FCLK                                  43
   53 #define MM_AXI_S2_CLK                                   44
   54 #define MM_AXI_S1_CLK                                   45
   55 #define MM_AXI_S0_CLK                                   46
   56 #define CSI0_SRC                                        47
   57 #define CSI0_CLK                                        48
   58 #define CSI0_PHY_CLK                                    49
   59 #define CSI1_SRC                                        50
   60 #define CSI1_CLK                                        51
   61 #define CSI1_PHY_CLK                                    52
   62 #define CSI2_SRC                                        53
   63 #define CSI2_CLK                                        54
   64 #define CSI2_PHY_CLK                                    55
   65 #define DSI_SRC                                         56
   66 #define DSI_CLK                                         57
   67 #define CSI_PIX_CLK                                     58
   68 #define CSI_RDI_CLK                                     59
   69 #define MDP_VSYNC_CLK                                   60
   70 #define HDMI_DIV_CLK                                    61
   71 #define HDMI_APP_CLK                                    62
   72 #define CSI_PIX1_CLK                                    63
   73 #define CSI_RDI2_CLK                                    64
   74 #define CSI_RDI1_CLK                                    65
   75 #define GFX2D0_SRC                                      66
   76 #define GFX2D0_CLK                                      67
   77 #define GFX2D1_SRC                                      68
   78 #define GFX2D1_CLK                                      69
   79 #define GFX3D_SRC                                       70
   80 #define GFX3D_CLK                                       71
   81 #define IJPEG_SRC                                       72
   82 #define IJPEG_CLK                                       73
   83 #define JPEGD_SRC                                       74
   84 #define JPEGD_CLK                                       75
   85 #define MDP_SRC                                         76
   86 #define MDP_CLK                                         77
   87 #define MDP_LUT_CLK                                     78
   88 #define DSI2_PIXEL_SRC                                  79
   89 #define DSI2_PIXEL_CLK                                  80
   90 #define DSI2_SRC                                        81
   91 #define DSI2_CLK                                        82
   92 #define DSI1_BYTE_SRC                                   83
   93 #define DSI1_BYTE_CLK                                   84
   94 #define DSI2_BYTE_SRC                                   85
   95 #define DSI2_BYTE_CLK                                   86
   96 #define DSI1_ESC_SRC                                    87
   97 #define DSI1_ESC_CLK                                    88
   98 #define DSI2_ESC_SRC                                    89
   99 #define DSI2_ESC_CLK                                    90
  100 #define ROT_SRC                                         91
  101 #define ROT_CLK                                         92
  102 #define TV_ENC_CLK                                      93
  103 #define TV_DAC_CLK                                      94
  104 #define HDMI_TV_CLK                                     95
  105 #define MDP_TV_CLK                                      96
  106 #define TV_SRC                                          97
  107 #define VCODEC_SRC                                      98
  108 #define VCODEC_CLK                                      99
  109 #define VFE_SRC                                         100
  110 #define VFE_CLK                                         101
  111 #define VFE_CSI_CLK                                     102
  112 #define VPE_SRC                                         103
  113 #define VPE_CLK                                         104
  114 #define DSI_PIXEL_SRC                                   105
  115 #define DSI_PIXEL_CLK                                   106
  116 #define CAMCLK0_SRC                                     107
  117 #define CAMCLK0_CLK                                     108
  118 #define CAMCLK1_SRC                                     109
  119 #define CAMCLK1_CLK                                     110
  120 #define CAMCLK2_SRC                                     111
  121 #define CAMCLK2_CLK                                     112
  122 #define CSIPHYTIMER_SRC                                 113
  123 #define CSIPHY2_TIMER_CLK                               114
  124 #define CSIPHY1_TIMER_CLK                               115
  125 #define CSIPHY0_TIMER_CLK                               116
  126 #define PLL1                                            117
  127 #define PLL2                                            118
  128 #define RGB_TV_CLK                                      119
  129 #define NPL_TV_CLK                                      120
  130 #define VCAP_AHB_CLK                                    121
  131 #define VCAP_AXI_CLK                                    122
  132 #define VCAP_SRC                                        123
  133 #define VCAP_CLK                                        124
  134 #define VCAP_NPL_CLK                                    125
  135 #define PLL15                                           126
  136 
  137 #endif

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