The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/include/dt-bindings/clock/r8a77980-cpg-mssr.h

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    1 /* SPDX-License-Identifier: GPL-2.0+ */
    2 /*
    3  * Copyright (C) 2018 Renesas Electronics Corp.
    4  * Copyright (C) 2018 Cogent Embedded, Inc.
    5  */
    6 #ifndef __DT_BINDINGS_CLOCK_R8A77980_CPG_MSSR_H__
    7 #define __DT_BINDINGS_CLOCK_R8A77980_CPG_MSSR_H__
    8 
    9 #include <dt-bindings/clock/renesas-cpg-mssr.h>
   10 
   11 /* r8a77980 CPG Core Clocks */
   12 #define R8A77980_CLK_Z2                 0
   13 #define R8A77980_CLK_ZR                 1
   14 #define R8A77980_CLK_ZTR                2
   15 #define R8A77980_CLK_ZTRD2              3
   16 #define R8A77980_CLK_ZT                 4
   17 #define R8A77980_CLK_ZX                 5
   18 #define R8A77980_CLK_S0D1               6
   19 #define R8A77980_CLK_S0D2               7
   20 #define R8A77980_CLK_S0D3               8
   21 #define R8A77980_CLK_S0D4               9
   22 #define R8A77980_CLK_S0D6               10
   23 #define R8A77980_CLK_S0D12              11
   24 #define R8A77980_CLK_S0D24              12
   25 #define R8A77980_CLK_S1D1               13
   26 #define R8A77980_CLK_S1D2               14
   27 #define R8A77980_CLK_S1D4               15
   28 #define R8A77980_CLK_S2D1               16
   29 #define R8A77980_CLK_S2D2               17
   30 #define R8A77980_CLK_S2D4               18
   31 #define R8A77980_CLK_S3D1               19
   32 #define R8A77980_CLK_S3D2               20
   33 #define R8A77980_CLK_S3D4               21
   34 #define R8A77980_CLK_LB                 22
   35 #define R8A77980_CLK_CL                 23
   36 #define R8A77980_CLK_ZB3                24
   37 #define R8A77980_CLK_ZB3D2              25
   38 #define R8A77980_CLK_ZB3D4              26
   39 #define R8A77980_CLK_SD0H               27
   40 #define R8A77980_CLK_SD0                28
   41 #define R8A77980_CLK_RPC                29
   42 #define R8A77980_CLK_RPCD2              30
   43 #define R8A77980_CLK_MSO                31
   44 #define R8A77980_CLK_CANFD              32
   45 #define R8A77980_CLK_CSI0               33
   46 #define R8A77980_CLK_CP                 34
   47 #define R8A77980_CLK_CPEX               35
   48 #define R8A77980_CLK_R                  36
   49 #define R8A77980_CLK_OSC                37
   50 
   51 #endif /* __DT_BINDINGS_CLOCK_R8A77980_CPG_MSSR_H__ */

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