The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/include/dt-bindings/clock/r8a779a0-cpg-mssr.h

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    1 /* SPDX-License-Identifier: GPL-2.0-only */
    2 /*
    3  * Copyright (C) 2020 Renesas Electronics Corp.
    4  */
    5 #ifndef __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__
    6 #define __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__
    7 
    8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
    9 
   10 /* r8a779A0 CPG Core Clocks */
   11 #define R8A779A0_CLK_Z0                 0
   12 #define R8A779A0_CLK_ZX                 1
   13 #define R8A779A0_CLK_Z1                 2
   14 #define R8A779A0_CLK_ZR                 3
   15 #define R8A779A0_CLK_ZS                 4
   16 #define R8A779A0_CLK_ZT                 5
   17 #define R8A779A0_CLK_ZTR                6
   18 #define R8A779A0_CLK_S1D1               7
   19 #define R8A779A0_CLK_S1D2               8
   20 #define R8A779A0_CLK_S1D4               9
   21 #define R8A779A0_CLK_S1D8               10
   22 #define R8A779A0_CLK_S1D12              11
   23 #define R8A779A0_CLK_S3D1               12
   24 #define R8A779A0_CLK_S3D2               13
   25 #define R8A779A0_CLK_S3D4               14
   26 #define R8A779A0_CLK_LB                 15
   27 #define R8A779A0_CLK_CP                 16
   28 #define R8A779A0_CLK_CL                 17
   29 #define R8A779A0_CLK_CL16MCK            18
   30 #define R8A779A0_CLK_ZB30               19
   31 #define R8A779A0_CLK_ZB30D2             20
   32 #define R8A779A0_CLK_ZB30D4             21
   33 #define R8A779A0_CLK_ZB31               22
   34 #define R8A779A0_CLK_ZB31D2             23
   35 #define R8A779A0_CLK_ZB31D4             24
   36 #define R8A779A0_CLK_SD0H               25
   37 #define R8A779A0_CLK_SD0                26
   38 #define R8A779A0_CLK_RPC                27
   39 #define R8A779A0_CLK_RPCD2              28
   40 #define R8A779A0_CLK_MSO                29
   41 #define R8A779A0_CLK_CANFD              30
   42 #define R8A779A0_CLK_CSI0               31
   43 #define R8A779A0_CLK_FRAY               32
   44 #define R8A779A0_CLK_DSI                33
   45 #define R8A779A0_CLK_VIP                34
   46 #define R8A779A0_CLK_ADGH               35
   47 #define R8A779A0_CLK_CNNDSP             36
   48 #define R8A779A0_CLK_ICU                37
   49 #define R8A779A0_CLK_ICUD2              38
   50 #define R8A779A0_CLK_VCBUS              39
   51 #define R8A779A0_CLK_CBFUSA             40
   52 #define R8A779A0_CLK_R                  41
   53 #define R8A779A0_CLK_OSC                42
   54 
   55 #endif /* __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__ */

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