The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/include/dt-bindings/clock/stm32h7-clks.h

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
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    1 /* SYS, CORE AND BUS CLOCKS */
    2 #define SYS_D1CPRE 0
    3 #define HCLK 1
    4 #define PCLK1 2
    5 #define PCLK2 3
    6 #define PCLK3 4
    7 #define PCLK4 5
    8 #define HSI_DIV 6
    9 #define HSE_1M 7
   10 #define I2S_CKIN 8
   11 #define CK_DSI_PHY 9
   12 #define HSE_CK 10
   13 #define LSE_CK 11
   14 #define CSI_KER_DIV122 12
   15 #define RTC_CK 13
   16 #define CPU_SYSTICK 14
   17 
   18 /* OSCILLATOR BANK */
   19 #define OSC_BANK 18
   20 #define HSI_CK 18
   21 #define HSI_KER_CK 19
   22 #define CSI_CK 20
   23 #define CSI_KER_CK 21
   24 #define RC48_CK 22
   25 #define LSI_CK 23
   26 
   27 /* MCLOCK BANK */
   28 #define MCLK_BANK 28
   29 #define PER_CK 28
   30 #define PLLSRC 29
   31 #define SYS_CK 30
   32 #define TRACEIN_CK 31
   33 
   34 /* ODF BANK */
   35 #define ODF_BANK 32
   36 #define PLL1_P 32
   37 #define PLL1_Q 33
   38 #define PLL1_R 34
   39 #define PLL2_P 35
   40 #define PLL2_Q 36
   41 #define PLL2_R 37
   42 #define PLL3_P 38
   43 #define PLL3_Q 39
   44 #define PLL3_R 40
   45 
   46 /* MCO BANK */
   47 #define MCO_BANK 41
   48 #define MCO1 41
   49 #define MCO2 42
   50 
   51 /* PERIF BANK */
   52 #define PERIF_BANK 50
   53 #define D1SRAM1_CK 50
   54 #define ITCM_CK 51
   55 #define DTCM2_CK 52
   56 #define DTCM1_CK 53
   57 #define FLITF_CK 54
   58 #define JPGDEC_CK 55
   59 #define DMA2D_CK 56
   60 #define MDMA_CK 57
   61 #define USB2ULPI_CK 58
   62 #define USB1ULPI_CK 59
   63 #define ETH1RX_CK 60
   64 #define ETH1TX_CK 61
   65 #define ETH1MAC_CK 62
   66 #define ART_CK 63
   67 #define DMA2_CK 64
   68 #define DMA1_CK 65
   69 #define D2SRAM3_CK 66
   70 #define D2SRAM2_CK 67
   71 #define D2SRAM1_CK 68
   72 #define HASH_CK 69
   73 #define CRYPT_CK 70
   74 #define CAMITF_CK 71
   75 #define BKPRAM_CK 72
   76 #define HSEM_CK 73
   77 #define BDMA_CK 74
   78 #define CRC_CK 75
   79 #define GPIOK_CK 76
   80 #define GPIOJ_CK 77
   81 #define GPIOI_CK 78
   82 #define GPIOH_CK 79
   83 #define GPIOG_CK 80
   84 #define GPIOF_CK 81
   85 #define GPIOE_CK 82
   86 #define GPIOD_CK 83
   87 #define GPIOC_CK 84
   88 #define GPIOB_CK 85
   89 #define GPIOA_CK 86
   90 #define WWDG1_CK 87
   91 #define DAC12_CK 88
   92 #define WWDG2_CK 89
   93 #define TIM14_CK 90
   94 #define TIM13_CK 91
   95 #define TIM12_CK 92
   96 #define TIM7_CK 93
   97 #define TIM6_CK 94
   98 #define TIM5_CK 95
   99 #define TIM4_CK 96
  100 #define TIM3_CK 97
  101 #define TIM2_CK 98
  102 #define MDIOS_CK 99
  103 #define OPAMP_CK 100
  104 #define CRS_CK 101
  105 #define TIM17_CK 102
  106 #define TIM16_CK 103
  107 #define TIM15_CK 104
  108 #define TIM8_CK 105
  109 #define TIM1_CK 106
  110 #define TMPSENS_CK 107
  111 #define RTCAPB_CK 108
  112 #define VREF_CK 109
  113 #define COMP12_CK 110
  114 #define SYSCFG_CK 111
  115 
  116 /* KERNEL BANK */
  117 #define KERN_BANK 120
  118 #define SDMMC1_CK 120
  119 #define QUADSPI_CK 121
  120 #define FMC_CK 122
  121 #define USB2OTG_CK 123
  122 #define USB1OTG_CK 124
  123 #define ADC12_CK 125
  124 #define SDMMC2_CK 126
  125 #define RNG_CK 127
  126 #define ADC3_CK 128
  127 #define DSI_CK 129
  128 #define LTDC_CK 130
  129 #define USART8_CK 131
  130 #define USART7_CK 132
  131 #define HDMICEC_CK 133
  132 #define I2C3_CK 134
  133 #define I2C2_CK 135
  134 #define I2C1_CK 136
  135 #define UART5_CK 137
  136 #define UART4_CK 138
  137 #define USART3_CK 139
  138 #define USART2_CK 140
  139 #define SPDIFRX_CK 141
  140 #define SPI3_CK 142
  141 #define SPI2_CK 143
  142 #define LPTIM1_CK 144
  143 #define FDCAN_CK 145
  144 #define SWP_CK 146
  145 #define HRTIM_CK 147
  146 #define DFSDM1_CK 148
  147 #define SAI3_CK 149
  148 #define SAI2_CK 150
  149 #define SAI1_CK 151
  150 #define SPI5_CK 152
  151 #define SPI4_CK 153
  152 #define SPI1_CK 154
  153 #define USART6_CK 155
  154 #define USART1_CK 156
  155 #define SAI4B_CK 157
  156 #define SAI4A_CK 158
  157 #define LPTIM5_CK 159
  158 #define LPTIM4_CK 160
  159 #define LPTIM3_CK 161
  160 #define LPTIM2_CK 162
  161 #define I2C4_CK 163
  162 #define SPI6_CK 164
  163 #define LPUART1_CK 165
  164 
  165 #define STM32H7_MAX_CLKS 166

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