The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/include/dt-bindings/memory/mt8167-larb-port.h

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    1 /* SPDX-License-Identifier: GPL-2.0 */
    2 /*
    3  * Copyright (c) 2020 MediaTek Inc.
    4  * Copyright (c) 2020 BayLibre, SAS
    5  * Author: Honghui Zhang <honghui.zhang@mediatek.com>
    6  * Author: Fabien Parent <fparent@baylibre.com>
    7  */
    8 #ifndef _DT_BINDINGS_MEMORY_MT8167_LARB_PORT_H_
    9 #define _DT_BINDINGS_MEMORY_MT8167_LARB_PORT_H_
   10 
   11 #include <dt-bindings/memory/mtk-memory-port.h>
   12 
   13 #define M4U_LARB0_ID                    0
   14 #define M4U_LARB1_ID                    1
   15 #define M4U_LARB2_ID                    2
   16 
   17 /* larb0 */
   18 #define M4U_PORT_DISP_OVL0              MTK_M4U_ID(M4U_LARB0_ID, 0)
   19 #define M4U_PORT_DISP_RDMA0             MTK_M4U_ID(M4U_LARB0_ID, 1)
   20 #define M4U_PORT_DISP_WDMA0             MTK_M4U_ID(M4U_LARB0_ID, 2)
   21 #define M4U_PORT_DISP_RDMA1             MTK_M4U_ID(M4U_LARB0_ID, 3)
   22 #define M4U_PORT_MDP_RDMA               MTK_M4U_ID(M4U_LARB0_ID, 4)
   23 #define M4U_PORT_MDP_WDMA               MTK_M4U_ID(M4U_LARB0_ID, 5)
   24 #define M4U_PORT_MDP_WROT               MTK_M4U_ID(M4U_LARB0_ID, 6)
   25 #define M4U_PORT_DISP_FAKE              MTK_M4U_ID(M4U_LARB0_ID, 7)
   26 
   27 /* larb1*/
   28 #define M4U_PORT_CAM_IMGO               MTK_M4U_ID(M4U_LARB1_ID, 0)
   29 #define M4U_PORT_CAM_IMG2O              MTK_M4U_ID(M4U_LARB1_ID, 1)
   30 #define M4U_PORT_CAM_LSCI               MTK_M4U_ID(M4U_LARB1_ID, 2)
   31 #define M4U_PORT_CAM_ESFKO              MTK_M4U_ID(M4U_LARB1_ID, 3)
   32 #define M4U_PORT_CAM_AAO                MTK_M4U_ID(M4U_LARB1_ID, 4)
   33 #define M4U_PORT_VENC_REC               MTK_M4U_ID(M4U_LARB1_ID, 5)
   34 #define M4U_PORT_VENC_BSDMA             MTK_M4U_ID(M4U_LARB1_ID, 6)
   35 #define M4U_PORT_VENC_RD_COMV           MTK_M4U_ID(M4U_LARB1_ID, 7)
   36 #define M4U_PORT_CAM_IMGI               MTK_M4U_ID(M4U_LARB1_ID, 8)
   37 #define M4U_PORT_VENC_CUR_LUMA          MTK_M4U_ID(M4U_LARB1_ID, 9)
   38 #define M4U_PORT_VENC_CUR_CHROMA        MTK_M4U_ID(M4U_LARB1_ID, 10)
   39 #define M4U_PORT_VENC_REF_LUMA          MTK_M4U_ID(M4U_LARB1_ID, 11)
   40 #define M4U_PORT_VENC_REF_CHROMA        MTK_M4U_ID(M4U_LARB1_ID, 12)
   41 
   42 /* larb2*/
   43 #define M4U_PORT_HW_VDEC_MC_EXT         MTK_M4U_ID(M4U_LARB2_ID, 0)
   44 #define M4U_PORT_HW_VDEC_PP_EXT         MTK_M4U_ID(M4U_LARB2_ID, 1)
   45 #define M4U_PORT_HW_VDEC_VLD_EXT        MTK_M4U_ID(M4U_LARB2_ID, 2)
   46 #define M4U_PORT_HW_VDEC_AVC_MV_EXT     MTK_M4U_ID(M4U_LARB2_ID, 3)
   47 #define M4U_PORT_HW_VDEC_PRED_RD_EXT    MTK_M4U_ID(M4U_LARB2_ID, 4)
   48 #define M4U_PORT_HW_VDEC_PRED_WR_EXT    MTK_M4U_ID(M4U_LARB2_ID, 5)
   49 #define M4U_PORT_HW_VDEC_PPWRAP_EXT     MTK_M4U_ID(M4U_LARB2_ID, 6)
   50 
   51 #endif

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