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     1 /* SPDX-License-Identifier: GPL-2.0-only */
    2 /*
    3  * This header provides constants for Tegra pinctrl bindings.
    4  *
    5  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
    6  *
    7  * Author: Laxman Dewangan <ldewangan@nvidia.com>
    8  */
    9 
   10 #ifndef _DT_BINDINGS_PINCTRL_TEGRA_H
   11 #define _DT_BINDINGS_PINCTRL_TEGRA_H
   12 
   13 /*
   14  * Enable/disable for diffeent dt properties. This is applicable for
   15  * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
   16  * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
   17  */
   18 #define TEGRA_PIN_DISABLE                               0
   19 #define TEGRA_PIN_ENABLE                                1
   20 
   21 #define TEGRA_PIN_PULL_NONE                             0
   22 #define TEGRA_PIN_PULL_DOWN                             1
   23 #define TEGRA_PIN_PULL_UP                               2
   24 
   25 /* Low power mode driver */
   26 #define TEGRA_PIN_LP_DRIVE_DIV_8                        0
   27 #define TEGRA_PIN_LP_DRIVE_DIV_4                        1
   28 #define TEGRA_PIN_LP_DRIVE_DIV_2                        2
   29 #define TEGRA_PIN_LP_DRIVE_DIV_1                        3
   30 
   31 /* Rising/Falling slew rate */
   32 #define TEGRA_PIN_SLEW_RATE_FASTEST                     0
   33 #define TEGRA_PIN_SLEW_RATE_FAST                        1
   34 #define TEGRA_PIN_SLEW_RATE_SLOW                        2
   35 #define TEGRA_PIN_SLEW_RATE_SLOWEST                     3
   36 
   37 #endif
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