1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __DT_BINDINGS_POWER_RK3568_POWER_H__
3 #define __DT_BINDINGS_POWER_RK3568_POWER_H__
4
5 /* VD_CORE */
6 #define RK3568_PD_CPU_0 0
7 #define RK3568_PD_CPU_1 1
8 #define RK3568_PD_CPU_2 2
9 #define RK3568_PD_CPU_3 3
10 #define RK3568_PD_CORE_ALIVE 4
11
12 /* VD_PMU */
13 #define RK3568_PD_PMU 5
14
15 /* VD_NPU */
16 #define RK3568_PD_NPU 6
17
18 /* VD_GPU */
19 #define RK3568_PD_GPU 7
20
21 /* VD_LOGIC */
22 #define RK3568_PD_VI 8
23 #define RK3568_PD_VO 9
24 #define RK3568_PD_RGA 10
25 #define RK3568_PD_VPU 11
26 #define RK3568_PD_CENTER 12
27 #define RK3568_PD_RKVDEC 13
28 #define RK3568_PD_RKVENC 14
29 #define RK3568_PD_PIPE 15
30 #define RK3568_PD_LOGIC_ALIVE 16
31
32 #endif
Cache object: ff7ce74224981aa3c9f58f8ac8b72c45
|