The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/include/dt-bindings/reset-controller/mt8192-resets.h

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10  
    1 /* SPDX-License-Identifier: GPL-2.0 */
    2 /*
    3  * Copyright (c) 2020 MediaTek Inc.
    4  * Author: Yong Liang <yong.liang@mediatek.com>
    5  */
    6 
    7 #ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8192
    8 #define _DT_BINDINGS_RESET_CONTROLLER_MT8192
    9 
   10 #define MT8192_TOPRGU_MM_SW_RST                                 1
   11 #define MT8192_TOPRGU_MFG_SW_RST                                2
   12 #define MT8192_TOPRGU_VENC_SW_RST                               3
   13 #define MT8192_TOPRGU_VDEC_SW_RST                               4
   14 #define MT8192_TOPRGU_IMG_SW_RST                                5
   15 #define MT8192_TOPRGU_MD_SW_RST                                 7
   16 #define MT8192_TOPRGU_CONN_SW_RST                               9
   17 #define MT8192_TOPRGU_CONN_MCU_SW_RST                   12
   18 #define MT8192_TOPRGU_IPU0_SW_RST                               14
   19 #define MT8192_TOPRGU_IPU1_SW_RST                               15
   20 #define MT8192_TOPRGU_AUDIO_SW_RST                              17
   21 #define MT8192_TOPRGU_CAMSYS_SW_RST                             18
   22 #define MT8192_TOPRGU_MJC_SW_RST                                19
   23 #define MT8192_TOPRGU_C2K_S2_SW_RST                             20
   24 #define MT8192_TOPRGU_C2K_SW_RST                                21
   25 #define MT8192_TOPRGU_PERI_SW_RST                               22
   26 #define MT8192_TOPRGU_PERI_AO_SW_RST                    23
   27 
   28 #define MT8192_TOPRGU_SW_RST_NUM                                23
   29 
   30 #endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8192 */

Cache object: 348de4eb5455615599446136f0adceee

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.