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     1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
    2  *
    3  * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
    4  * Author: Xingyu Chen <xingyu.chen@amlogic.com>
    5  *
    6  */
    7 
    8 #ifndef _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H
    9 #define _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H
   10 
   11 /*      RESET0                                  */
   12 /*                                      0       */
   13 #define RESET_AM2AXI_VAD                1
   14 /*                                      2-3     */
   15 #define RESET_PSRAM                     4
   16 #define RESET_PAD_CTRL                  5
   17 /*                                      6       */
   18 #define RESET_TEMP_SENSOR               7
   19 #define RESET_AM2AXI_DEV                8
   20 /*                                      9       */
   21 #define RESET_SPICC_A                   10
   22 #define RESET_MSR_CLK                   11
   23 #define RESET_AUDIO                     12
   24 #define RESET_ANALOG_CTRL               13
   25 #define RESET_SAR_ADC                   14
   26 #define RESET_AUDIO_VAD                 15
   27 #define RESET_CEC                       16
   28 #define RESET_PWM_EF                    17
   29 #define RESET_PWM_CD                    18
   30 #define RESET_PWM_AB                    19
   31 /*                                      20      */
   32 #define RESET_IR_CTRL                   21
   33 #define RESET_I2C_S_A                   22
   34 /*                                      23      */
   35 #define RESET_I2C_M_D                   24
   36 #define RESET_I2C_M_C                   25
   37 #define RESET_I2C_M_B                   26
   38 #define RESET_I2C_M_A                   27
   39 #define RESET_I2C_PROD_AHB              28
   40 #define RESET_I2C_PROD                  29
   41 /*                                      30-31   */
   42 
   43 /*      RESET1                                  */
   44 #define RESET_ACODEC                    32
   45 #define RESET_DMA                       33
   46 #define RESET_SD_EMMC_A                 34
   47 /*                                      35      */
   48 #define RESET_USBCTRL                   36
   49 /*                                      37      */
   50 #define RESET_USBPHY                    38
   51 /*                                      39-41   */
   52 #define RESET_RSA                       42
   53 #define RESET_DMC                       43
   54 /*                                      44      */
   55 #define RESET_IRQ_CTRL                  45
   56 /*                                      46      */
   57 #define RESET_NIC_VAD                   47
   58 #define RESET_NIC_AXI                   48
   59 #define RESET_RAMA                      49
   60 #define RESET_RAMB                      50
   61 /*                                      51-52   */
   62 #define RESET_ROM                       53
   63 #define RESET_SPIFC                     54
   64 #define RESET_GIC                       55
   65 #define RESET_UART_C                    56
   66 #define RESET_UART_B                    57
   67 #define RESET_UART_A                    58
   68 #define RESET_OSC_RING                  59
   69 /*                                      60-63   */
   70 
   71 /*      RESET2                                  */
   72 /*                                      64-95   */
   73 
   74 #endif
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