FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/include/dt-bindings/reset/starfive-jh7100.h

     /* SPDX-License-Identifier: GPL-2.0 OR MIT */
     /*
      * Copyright (C) 2021 Ahmad Fatoum, Pengutronix
      */
     
     #ifndef __DT_BINDINGS_RESET_STARFIVE_JH7100_H__
     #define __DT_BINDINGS_RESET_STARFIVE_JH7100_H__
     
     #define JH7100_RSTN_DOM3AHB_BUS         0
    #define JH7100_RSTN_DOM7AHB_BUS         1
    #define JH7100_RST_U74                  2
    #define JH7100_RSTN_U74_AXI             3
    #define JH7100_RSTN_SGDMA2P_AHB         4
    #define JH7100_RSTN_SGDMA2P_AXI         5
    #define JH7100_RSTN_DMA2PNOC_AXI        6
    #define JH7100_RSTN_DLA_AXI             7
    #define JH7100_RSTN_DLANOC_AXI          8
    #define JH7100_RSTN_DLA_APB             9
    #define JH7100_RST_VP6_DRESET           10
    #define JH7100_RST_VP6_BRESET           11
    #define JH7100_RSTN_VP6_AXI             12
    #define JH7100_RSTN_VDECBRG_MAIN        13
    #define JH7100_RSTN_VDEC_AXI            14
    #define JH7100_RSTN_VDEC_BCLK           15
    #define JH7100_RSTN_VDEC_CCLK           16
    #define JH7100_RSTN_VDEC_APB            17
    #define JH7100_RSTN_JPEG_AXI            18
    #define JH7100_RSTN_JPEG_CCLK           19
    #define JH7100_RSTN_JPEG_APB            20
    #define JH7100_RSTN_JPCGC300_MAIN       21
    #define JH7100_RSTN_GC300_2X            22
    #define JH7100_RSTN_GC300_AXI           23
    #define JH7100_RSTN_GC300_AHB           24
    #define JH7100_RSTN_VENC_AXI            25
    #define JH7100_RSTN_VENCBRG_MAIN        26
    #define JH7100_RSTN_VENC_BCLK           27
    #define JH7100_RSTN_VENC_CCLK           28
    #define JH7100_RSTN_VENC_APB            29
    #define JH7100_RSTN_DDRPHY_APB          30
    #define JH7100_RSTN_NOC_ROB             31
    #define JH7100_RSTN_NOC_COG             32
    #define JH7100_RSTN_HIFI4_AXI           33
    #define JH7100_RSTN_HIFI4NOC_AXI        34
    #define JH7100_RST_HIFI4_DRESET         35
    #define JH7100_RST_HIFI4_BRESET         36
    #define JH7100_RSTN_USB_AXI             37
    #define JH7100_RSTN_USBNOC_AXI          38
    #define JH7100_RSTN_SGDMA1P_AXI         39
    #define JH7100_RSTN_DMA1P_AXI           40
    #define JH7100_RSTN_X2C_AXI             41
    #define JH7100_RSTN_NNE_AHB             42
    #define JH7100_RSTN_NNE_AXI             43
    #define JH7100_RSTN_NNENOC_AXI          44
    #define JH7100_RSTN_DLASLV_AXI          45
    #define JH7100_RSTN_DSPX2C_AXI          46
    #define JH7100_RSTN_VIN_SRC             47
    #define JH7100_RSTN_ISPSLV_AXI          48
    #define JH7100_RSTN_VIN_AXI             49
    #define JH7100_RSTN_VINNOC_AXI          50
    #define JH7100_RSTN_ISP0_AXI            51
    #define JH7100_RSTN_ISP0NOC_AXI         52
    #define JH7100_RSTN_ISP1_AXI            53
    #define JH7100_RSTN_ISP1NOC_AXI         54
    #define JH7100_RSTN_VOUT_SRC            55
    #define JH7100_RSTN_DISP_AXI            56
    #define JH7100_RSTN_DISPNOC_AXI         57
    #define JH7100_RSTN_SDIO0_AHB           58
    #define JH7100_RSTN_SDIO1_AHB           59
    #define JH7100_RSTN_GMAC_AHB            60
    #define JH7100_RSTN_SPI2AHB_AHB         61
    #define JH7100_RSTN_SPI2AHB_CORE        62
    #define JH7100_RSTN_EZMASTER_AHB        63
    #define JH7100_RST_E24                  64
    #define JH7100_RSTN_QSPI_AHB            65
    #define JH7100_RSTN_QSPI_CORE           66
    #define JH7100_RSTN_QSPI_APB            67
    #define JH7100_RSTN_SEC_AHB             68
    #define JH7100_RSTN_AES                 69
    #define JH7100_RSTN_PKA                 70
    #define JH7100_RSTN_SHA                 71
    #define JH7100_RSTN_TRNG_APB            72
    #define JH7100_RSTN_OTP_APB             73
    #define JH7100_RSTN_UART0_APB           74
    #define JH7100_RSTN_UART0_CORE          75
    #define JH7100_RSTN_UART1_APB           76
    #define JH7100_RSTN_UART1_CORE          77
    #define JH7100_RSTN_SPI0_APB            78
    #define JH7100_RSTN_SPI0_CORE           79
    #define JH7100_RSTN_SPI1_APB            80
    #define JH7100_RSTN_SPI1_CORE           81
    #define JH7100_RSTN_I2C0_APB            82
    #define JH7100_RSTN_I2C0_CORE           83
    #define JH7100_RSTN_I2C1_APB            84
    #define JH7100_RSTN_I2C1_CORE           85
    #define JH7100_RSTN_GPIO_APB            86
    #define JH7100_RSTN_UART2_APB           87
    #define JH7100_RSTN_UART2_CORE          88
    #define JH7100_RSTN_UART3_APB           89
    #define JH7100_RSTN_UART3_CORE          90
   #define JH7100_RSTN_SPI2_APB            91
   #define JH7100_RSTN_SPI2_CORE           92
   #define JH7100_RSTN_SPI3_APB            93
   #define JH7100_RSTN_SPI3_CORE           94
   #define JH7100_RSTN_I2C2_APB            95
   #define JH7100_RSTN_I2C2_CORE           96
   #define JH7100_RSTN_I2C3_APB            97
   #define JH7100_RSTN_I2C3_CORE           98
   #define JH7100_RSTN_WDTIMER_APB         99
   #define JH7100_RSTN_WDT                 100
   #define JH7100_RSTN_TIMER0              101
   #define JH7100_RSTN_TIMER1              102
   #define JH7100_RSTN_TIMER2              103
   #define JH7100_RSTN_TIMER3              104
   #define JH7100_RSTN_TIMER4              105
   #define JH7100_RSTN_TIMER5              106
   #define JH7100_RSTN_TIMER6              107
   #define JH7100_RSTN_VP6INTC_APB         108
   #define JH7100_RSTN_PWM_APB             109
   #define JH7100_RSTN_MSI_APB             110
   #define JH7100_RSTN_TEMP_APB            111
   #define JH7100_RSTN_TEMP_SENSE          112
   #define JH7100_RSTN_SYSERR_APB          113
   
   #define JH7100_RSTN_END                 114
   
   #endif /* __DT_BINDINGS_RESET_STARFIVE_JH7100_H__ */

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