The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/include/dt-bindings/reset/stericsson,db8500-prcc-reset.h

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
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    1 /* SPDX-License-Identifier: GPL-2.0 */
    2 
    3 #ifndef _DT_BINDINGS_STE_PRCC_RESET
    4 #define _DT_BINDINGS_STE_PRCC_RESET
    5 
    6 #define DB8500_PRCC_1                           1
    7 #define DB8500_PRCC_2                           2
    8 #define DB8500_PRCC_3                           3
    9 #define DB8500_PRCC_6                           6
   10 
   11 /* Reset lines on PRCC 1 */
   12 #define DB8500_PRCC_1_RESET_UART0               0
   13 #define DB8500_PRCC_1_RESET_UART1               1
   14 #define DB8500_PRCC_1_RESET_I2C1                2
   15 #define DB8500_PRCC_1_RESET_MSP0                3
   16 #define DB8500_PRCC_1_RESET_MSP1                4
   17 #define DB8500_PRCC_1_RESET_SDI0                5
   18 #define DB8500_PRCC_1_RESET_I2C2                6
   19 #define DB8500_PRCC_1_RESET_SPI3                7
   20 #define DB8500_PRCC_1_RESET_SLIMBUS0            8
   21 #define DB8500_PRCC_1_RESET_I2C4                9
   22 #define DB8500_PRCC_1_RESET_MSP3                10
   23 #define DB8500_PRCC_1_RESET_PER_MSP3            11
   24 #define DB8500_PRCC_1_RESET_PER_MSP1            12
   25 #define DB8500_PRCC_1_RESET_PER_MSP0            13
   26 #define DB8500_PRCC_1_RESET_PER_SLIMBUS         14
   27 
   28 /* Reset lines on PRCC 2 */
   29 #define DB8500_PRCC_2_RESET_I2C3                0
   30 #define DB8500_PRCC_2_RESET_PWL                 1
   31 #define DB8500_PRCC_2_RESET_SDI4                2
   32 #define DB8500_PRCC_2_RESET_MSP2                3
   33 #define DB8500_PRCC_2_RESET_SDI1                4
   34 #define DB8500_PRCC_2_RESET_SDI3                5
   35 #define DB8500_PRCC_2_RESET_HSIRX               6
   36 #define DB8500_PRCC_2_RESET_HSITX               7
   37 #define DB8500_PRCC_1_RESET_PER_MSP2            8
   38 
   39 /* Reset lines on PRCC 3 */
   40 #define DB8500_PRCC_3_RESET_SSP0                1
   41 #define DB8500_PRCC_3_RESET_SSP1                2
   42 #define DB8500_PRCC_3_RESET_I2C0                3
   43 #define DB8500_PRCC_3_RESET_SDI2                4
   44 #define DB8500_PRCC_3_RESET_SKE                 5
   45 #define DB8500_PRCC_3_RESET_UART2               6
   46 #define DB8500_PRCC_3_RESET_SDI5                7
   47 
   48 /* Reset lines on PRCC 6 */
   49 #define DB8500_PRCC_3_RESET_RNG                 0
   50 
   51 #endif

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