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sys/contrib/device-tree/src/arm/am335x-guardian.dts
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1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 4 * Copyright (C) 2018 Robert Bosch Power Tools GmbH 5 */ 6 /dts-v1/; 7 8 #include "am33xx.dtsi" 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 12 / { 13 model = "Bosch AM335x Guardian"; 14 compatible = "bosch,am335x-guardian", "ti,am33xx"; 15 16 chosen { 17 stdout-path = &uart0; 18 tick-timer = &timer2; 19 }; 20 21 cpus { 22 cpu@0 { 23 cpu0-supply = <&dcdc2_reg>; 24 }; 25 }; 26 27 memory@80000000 { 28 device_type = "memory"; 29 reg = <0x80000000 0x10000000>; /* 256 MB */ 30 }; 31 32 guardian_buttons: gpio-keys { 33 pinctrl-names = "default"; 34 pinctrl-0 = <&guardian_button_pins>; 35 compatible = "gpio-keys"; 36 37 select-button { 38 label = "guardian-select-button"; 39 linux,code = <KEY_5>; 40 gpios = <&gpio1 31 GPIO_ACTIVE_LOW>; 41 wakeup-source; 42 }; 43 44 power-button { 45 label = "guardian-power-button"; 46 linux,code = <KEY_POWER>; 47 gpios = <&gpio2 21 GPIO_ACTIVE_LOW>; 48 wakeup-source; 49 }; 50 }; 51 52 guardian_leds: gpio-leds { 53 pinctrl-names = "default"; 54 pinctrl-0 = <&guardian_led_pins>; 55 compatible = "gpio-leds"; 56 57 life-led { 58 label = "guardian:life-led"; 59 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 60 linux,default-trigger = "heartbeat"; 61 default-state = "off"; 62 }; 63 }; 64 65 gpio-poweroff { 66 compatible = "gpio-poweroff"; 67 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; 68 }; 69 70 panel { 71 compatible = "ti,tilcdc,panel"; 72 pinctrl-names = "default", "sleep"; 73 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>; 74 pinctrl-1 = <&lcd_pins_sleep>; 75 76 display-timings { 77 320x240 { 78 hactive = <320>; 79 vactive = <240>; 80 hback-porch = <68>; 81 hfront-porch = <20>; 82 hsync-len = <1>; 83 vback-porch = <18>; 84 vfront-porch = <4>; 85 vsync-len = <1>; 86 clock-frequency = <9000000>; 87 hsync-active = <0>; 88 vsync-active = <0>; 89 }; 90 }; 91 panel-info { 92 ac-bias = <255>; 93 ac-bias-intrpt = <0>; 94 dma-burst-sz = <16>; 95 bpp = <24>; 96 bus-width = <16>; 97 fdd = <0x80>; 98 sync-edge = <0>; 99 sync-ctrl = <1>; 100 raster-order = <0>; 101 fifo-th = <0>; 102 }; 103 104 }; 105 106 guardian_beeper: dmtimer-pwm@7 { 107 compatible = "ti,omap-dmtimer-pwm"; 108 ti,timers = <&timer7>; 109 pinctrl-names = "default"; 110 pinctrl-0 = <&guardian_beeper_pins>; 111 ti,clock-source = <0x01>; 112 }; 113 114 vmmcsd_fixed: fixedregulator0 { 115 compatible = "regulator-fixed"; 116 regulator-name = "vmmcsd_fixed"; 117 regulator-min-microvolt = <3300000>; 118 regulator-max-microvolt = <3300000>; 119 }; 120 121 mt_keypad: mt_keypad@0 { 122 compatible = "gpio-mt-keypad"; 123 debounce-delay-ms = <10>; 124 col-scan-delay-us = <2>; 125 keypad,num-lines = <5>; 126 linux,no-autorepeat; 127 gpio-activelow; 128 line-gpios = < 129 &gpio1 24 GPIO_ACTIVE_LOW /*gpio_56*/ 130 &gpio1 23 GPIO_ACTIVE_LOW /*gpio_55*/ 131 &gpio1 22 GPIO_ACTIVE_LOW /*gpio_54*/ 132 &gpio1 20 GPIO_ACTIVE_LOW /*gpio_52*/ 133 &gpio1 16 GPIO_ACTIVE_LOW /*gpio_48*/ 134 >; 135 }; 136 }; 137 138 &elm { 139 status = "okay"; 140 }; 141 142 &gpmc { 143 pinctrl-names = "default"; 144 pinctrl-0 = <&nandflash_pins>; 145 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */ 146 status = "okay"; 147 148 nand@0,0 { 149 compatible = "ti,omap2-nand"; 150 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 151 interrupt-parent = <&gpmc>; 152 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 153 <1 IRQ_TYPE_NONE>; /* termcount */ 154 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ 155 ti,nand-xfer-type = "prefetch-dma"; 156 ti,nand-ecc-opt = "bch16"; 157 ti,elm-id = <&elm>; 158 nand-bus-width = <8>; 159 gpmc,device-width = <1>; 160 gpmc,sync-clk-ps = <0>; 161 gpmc,cs-on-ns = <0>; 162 gpmc,cs-rd-off-ns = <30>; 163 gpmc,cs-wr-off-ns = <30>; 164 gpmc,adv-on-ns = <0>; 165 gpmc,adv-rd-off-ns = <30>; 166 gpmc,adv-wr-off-ns = <30>; 167 gpmc,we-on-ns = <0>; 168 gpmc,we-off-ns = <15>; 169 gpmc,oe-on-ns = <1>; 170 gpmc,oe-off-ns = <15>; 171 gpmc,access-ns = <30>; 172 gpmc,rd-cycle-ns = <30>; 173 gpmc,wr-cycle-ns = <30>; 174 gpmc,bus-turnaround-ns = <0>; 175 gpmc,cycle2cycle-delay-ns = <0>; 176 gpmc,clk-activation-ns = <0>; 177 gpmc,wr-access-ns = <0>; 178 gpmc,wr-data-mux-bus-ns = <0>; 179 180 /* 181 * MTD partition table 182 * 183 * All SPL-* partitions are sized to minimal length which can 184 * be independently programmable. For NAND flash this is equal 185 * to size of erase-block. 186 */ 187 #address-cells = <1>; 188 #size-cells = <1>; 189 190 partition@0 { 191 label = "SPL"; 192 reg = <0x0 0x40000>; 193 }; 194 195 partition@1 { 196 label = "SPL.backup1"; 197 reg = <0x40000 0x40000>; 198 }; 199 200 partition@2 { 201 label = "SPL.backup2"; 202 reg = <0x80000 0x40000>; 203 }; 204 205 partition@3 { 206 label = "SPL.backup3"; 207 reg = <0xc0000 0x40000>; 208 }; 209 210 partition@4 { 211 label = "u-boot"; 212 reg = <0x100000 0x100000>; 213 }; 214 215 partition@5 { 216 label = "u-boot.backup1"; 217 reg = <0x200000 0x100000>; 218 }; 219 220 partition@6 { 221 label = "u-boot-2"; 222 reg = <0x300000 0x100000>; 223 }; 224 225 partition@7 { 226 label = "u-boot-2.backup1"; 227 reg = <0x400000 0x100000>; 228 }; 229 230 partition@8 { 231 label = "u-boot-env"; 232 reg = <0x500000 0x40000>; 233 }; 234 235 partition@9 { 236 label = "u-boot-env.backup1"; 237 reg = <0x540000 0x40000>; 238 }; 239 240 partition@10 { 241 label = "splash-screen"; 242 reg = <0x580000 0x40000>; 243 }; 244 245 partition@11 { 246 label = "UBI"; 247 reg = <0x5c0000 0x1fa40000>; 248 }; 249 }; 250 }; 251 252 &i2c0 { 253 pinctrl-names = "default"; 254 pinctrl-0 = <&i2c0_pins>; 255 clock-frequency = <400000>; 256 status = "okay"; 257 258 tps: tps@24 { 259 reg = <0x24>; 260 }; 261 }; 262 263 &lcdc { 264 blue-and-red-wiring = "crossed"; 265 status = "okay"; 266 port { 267 lcdc_0: endpoint@0 { 268 remote-endpoint = <0>; 269 }; 270 }; 271 }; 272 273 &mmc1 { 274 bus-width = <0x4>; 275 pinctrl-names = "default"; 276 pinctrl-0 = <&mmc1_pins>; 277 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 278 vmmc-supply = <&vmmcsd_fixed>; 279 status = "okay"; 280 }; 281 282 &rtc { 283 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; 284 clock-names = "ext-clk", "int-clk"; 285 }; 286 287 &spi0 { 288 ti,pindir-d0-out-d1-in; 289 pinctrl-names = "default"; 290 pinctrl-0 = <&spi0_pins>; 291 status = "okay"; 292 }; 293 294 #include "tps65217.dtsi" 295 296 &tps { 297 /* 298 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only 299 * mode") at poweroff. Most BeagleBone versions do not support RTC-only 300 * mode and risk hardware damage if this mode is entered. 301 * 302 * For details, see linux-omap mailing list May 2015 thread 303 * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller 304 * In particular, messages: 305 * http://www.spinics.net/lists/linux-omap/msg118585.html 306 * http://www.spinics.net/lists/linux-omap/msg118615.html 307 * 308 * You can override this later with 309 * &tps { /delete-property/ ti,pmic-shutdown-controller; } 310 * if you want to use RTC-only mode and made sure you are not affected 311 * by the hardware problems. (Tip: double-check by performing a current 312 * measurement after shutdown: it should be less than 1 mA.) 313 */ 314 ti,pmic-shutdown-controller; 315 interrupt-parent = <&intc>; 316 interrupts = <7>; /* NMI */ 317 318 backlight { 319 isel = <1>; /* 1 - ISET1, 2 ISET2 */ 320 fdim = <500>; /* TPS65217_BL_FDIM_500HZ */ 321 default-brightness = <50>; 322 /* 1(on) - enable current sink, while initialization */ 323 /* 0(off) - disable current sink, while initialization */ 324 isink-en = <1>; 325 }; 326 327 regulators { 328 dcdc1_reg: regulator@0 { 329 regulator-name = "vdds_dpr"; 330 regulator-always-on; 331 }; 332 333 dcdc2_reg: regulator@1 { 334 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 335 regulator-name = "vdd_mpu"; 336 regulator-min-microvolt = <925000>; 337 regulator-max-microvolt = <1351500>; 338 regulator-boot-on; 339 regulator-always-on; 340 }; 341 342 dcdc3_reg: regulator@2 { 343 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 344 regulator-name = "vdd_core"; 345 regulator-min-microvolt = <925000>; 346 regulator-max-microvolt = <1150000>; 347 regulator-boot-on; 348 regulator-always-on; 349 }; 350 351 ldo1_reg: regulator@3 { 352 regulator-name = "vio,vrtc,vdds"; 353 regulator-always-on; 354 }; 355 356 ldo2_reg: regulator@4 { 357 regulator-name = "vdd_3v3aux"; 358 regulator-always-on; 359 }; 360 361 ldo3_reg: regulator@5 { 362 regulator-name = "vdd_1v8"; 363 regulator-min-microvolt = <1800000>; 364 regulator-max-microvolt = <1800000>; 365 regulator-always-on; 366 }; 367 368 ldo4_reg: regulator@6 { 369 regulator-name = "vdd_3v3a"; 370 regulator-always-on; 371 }; 372 }; 373 }; 374 375 &tscadc { 376 status = "okay"; 377 378 adc { 379 ti,adc-channels = <0 1 2 3 4 5 6>; 380 }; 381 }; 382 383 &gpio0 { 384 gpio-line-names = 385 "", 386 "", 387 "", 388 "", 389 "", 390 "", 391 "", 392 "", 393 "", 394 "", 395 "", 396 "", 397 "", 398 "", 399 "", 400 "", 401 "", 402 "", 403 "", 404 "", 405 "", 406 "", 407 "", 408 "", 409 "", 410 "", 411 "", 412 "", 413 "", 414 "MirxWakeup", 415 "", 416 ""; 417 }; 418 419 &gpio3 { 420 ti,gpio-always-on; 421 ti,no-reset-on-init; 422 gpio-line-names = 423 "", 424 "MirxBtReset", 425 "", 426 "CcVolAdcEn", 427 "MirxBlePause", 428 "", 429 "", 430 "", 431 "", 432 "", 433 "", 434 "", 435 "", 436 "", 437 "AspEn", 438 "", 439 "", 440 "", 441 "", 442 "", 443 "", 444 "BatVolAdcEn", 445 "", 446 "", 447 "", 448 "", 449 "", 450 "", 451 "", 452 "", 453 "", 454 ""; 455 }; 456 457 &uart0 { 458 pinctrl-names = "default"; 459 pinctrl-0 = <&uart0_pins>; 460 status = "okay"; 461 }; 462 463 &uart2 { 464 pinctrl-names = "default"; 465 pinctrl-0 = <&uart2_pins>; 466 status = "okay"; 467 }; 468 469 &usb0 { 470 dr_mode = "peripheral"; 471 }; 472 473 &usb1 { 474 dr_mode = "host"; 475 /delete-property/dmas; 476 /delete-property/dma-names; 477 }; 478 479 &am33xx_pinmux { 480 pinctrl-names = "default"; 481 pinctrl-0 = <&clkout2_pin &guardian_interface_pins>; 482 483 clkout2_pin: pinmux_clkout2_pin { 484 pinctrl-single,pins = < 485 /* xdma_event_intr1.clkout2 */ 486 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) 487 >; 488 }; 489 490 guardian_interface_pins: pinmux_interface_pins { 491 pinctrl-single,pins = < 492 /* ADC_BATSENSE_EN */ 493 /* (A14) MCASP0_AHCLKx.gpio3[21] */ 494 AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) 495 /* ADC_COINCELL_EN */ 496 /* (J16) MII1_TX_EN.gpio3[3] */ 497 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) 498 /* ASP_ENABLE */ 499 /* (A13) MCASP0_ACLKx.gpio3[14] */ 500 AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLUP | MUX_MODE7) 501 /* (D16) uart1_rxd.uart1_rxd */ 502 AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE7) 503 /* (D15) uart1_txd.uart1_txd */ 504 AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE7) 505 /*SWITCH-OFF_3V6*/ 506 /* (M18) gpio0[1] */ 507 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE7) 508 /* MIRACULIX */ 509 /* (H17) gmii1_crs.gpio3[1] */ 510 AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) 511 /* (H18) rmii1_refclk.gpio0[29] */ 512 AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) 513 /* (J18) gmii1_txd3.gpio0[16] */ 514 AM33XX_IOPAD(0x91c, PIN_INPUT | MUX_MODE7 ) 515 /* (J17) gmii1_rxdv.gpio3[4] */ 516 AM33XX_IOPAD(0x918, PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) 517 >; 518 }; 519 520 guardian_beeper_pins: pinmux_dmtimer7_pins { 521 pinctrl-single,pins = < 522 AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) /* (E18) timer7 */ 523 >; 524 }; 525 526 guardian_button_pins: pinmux_guardian_button_pins { 527 pinctrl-single,pins = < 528 AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */ 529 AM33XX_IOPAD(0x884, PIN_INPUT | MUX_MODE7) /* (V9) gpmc_csn2.gpio1[31] */ 530 >; 531 }; 532 533 534 i2c0_pins: pinmux_i2c0_pins { 535 pinctrl-single,pins = < 536 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 537 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 538 >; 539 }; 540 541 led_bl_pins: gpio_led_bl_pins { 542 pinctrl-single,pins = < 543 /* P9_14, gpmc_a[2].GPIO1[18] (backlight control) */ 544 AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE7) 545 >; 546 }; 547 548 lcd_disen_pins: pinmux_lcd_disen_pins { 549 pinctrl-single,pins = < 550 /* P9_27, mcasp0_fsr.gpio3[19] (lcd_disen) */ 551 AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7) 552 >; 553 }; 554 555 lcd_pins_default: pinmux_lcd_pins_default { 556 pinctrl-single,pins = < 557 /* (U10) gpmc_ad8.lcd_data23 */ 558 AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 559 /* (T10) gpmc_ad9.lcd_data22 */ 560 AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 561 /* (T11) gpmc_ad10.lcd_data21 */ 562 AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 563 /* (U12) gpmc_ad11.lcd_data20 */ 564 AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 565 /* (T12) gpmc_ad12.lcd_data19 */ 566 AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 567 /* (R12) gpmc_ad13.lcd_data18 */ 568 AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 569 /* (V13) gpmc_ad14.lcd_data17 */ 570 AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 571 /* (U13) gpmc_ad15.lcd_data16 */ 572 AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 573 /* lcd_data0.lcd_data0 */ 574 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 575 /* lcd_data1.lcd_data1 */ 576 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 577 /* lcd_data2.lcd_data2 */ 578 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 579 /* lcd_data3.lcd_data3 */ 580 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 581 /* lcd_data4.lcd_data4 */ 582 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 583 /* lcd_data5.lcd_data5 */ 584 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 585 /* lcd_data6.lcd_data6 */ 586 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 587 /* lcd_data7.lcd_data7 */ 588 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 589 /* lcd_data8.lcd_data8 */ 590 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 591 /* lcd_data9.lcd_data9 */ 592 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 593 /* lcd_data10.lcd_data10 */ 594 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 595 /* lcd_data11.lcd_data11 */ 596 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 597 /* lcd_data12.lcd_data12 */ 598 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 599 /* lcd_data13.lcd_data13 */ 600 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 601 /* lcd_data14.lcd_data14 */ 602 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 603 /* lcd_data15.lcd_data15 */ 604 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 605 /* lcd_vsync.lcd_vsync */ 606 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 607 /* lcd_hsync.lcd_hsync */ 608 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 609 /* lcd_pclk.lcd_pclk */ 610 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 611 /* lcd_ac_bias_en.lcd_ac_bias_en */ 612 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 613 >; 614 }; 615 616 lcd_pins_sleep: pinmux_lcd_pins_sleep { 617 pinctrl-single,pins = < 618 /* lcd_data0.lcd_data0 */ 619 AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 620 /* lcd_data1.lcd_data1 */ 621 AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 622 /* lcd_data2.lcd_data2 */ 623 AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 624 /* lcd_data3.lcd_data3 */ 625 AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 626 /* lcd_data4.lcd_data4 */ 627 AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 628 /* lcd_data5.lcd_data5 */ 629 AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 630 /* lcd_data6.lcd_data6 */ 631 AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 632 /* lcd_data7.lcd_data7 */ 633 AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 634 /* lcd_data8.lcd_data8 */ 635 AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 636 /* lcd_data9.lcd_data9 */ 637 AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 638 /* lcd_data10.lcd_data10 */ 639 AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 640 /* lcd_data11.lcd_data11 */ 641 AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 642 /* lcd_data12.lcd_data12 */ 643 AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 644 /* lcd_data13.lcd_data13 */ 645 AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 646 /* lcd_data14.lcd_data14 */ 647 AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 648 /* lcd_data15.lcd_data15 */ 649 AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 650 /* lcd_vsync.lcd_vsync */ 651 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) 652 /* lcd_hsync.lcd_hsync */ 653 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) 654 /* lcd_pclk.lcd_pclk */ 655 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) 656 /* lcd_ac_bias_en.lcd_ac_bias_en */ 657 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) 658 >; 659 }; 660 661 guardian_led_pins: pinmux_guardian_led_pins { 662 pinctrl-single,pins = < 663 AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7) /* (T16) gpmc_a10.gpio1[26] */ 664 >; 665 }; 666 667 mmc1_pins: pinmux_mmc1_pins { 668 pinctrl-single,pins = < 669 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 670 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 671 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 672 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 673 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 674 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 675 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ 676 >; 677 }; 678 679 spi0_pins: pinmux_spi0_pins { 680 pinctrl-single,pins = < 681 /* SPI0_CLK - spi0_clk.spi */ 682 AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0) 683 /* SPI0_MOSI - spi0_d0.spi0 */ 684 AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0) 685 /* SPI0_MISO - spi0_d1.spi0 */ 686 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) 687 /* SPI0_CS0 - spi */ 688 AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0) 689 >; 690 }; 691 692 uart0_pins: pinmux_uart0_pins { 693 pinctrl-single,pins = < 694 /* uart0_rxd.uart0_rxd */ 695 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) 696 /* uart0_txd.uart0_txd */ 697 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) 698 >; 699 }; 700 701 uart2_pins: pinmux_uart2_pins { 702 pinctrl-single,pins = < 703 /* K18 uart2_rxd.mirx_txd */ 704 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1) 705 /* L18 uart2_txd.mirx_rxd */ 706 AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1) 707 >; 708 }; 709 710 nandflash_pins: pinmux_nandflash_pins { 711 pinctrl-single,pins = < 712 /* (U7) gpmc_ad0.gpmc_ad0 */ 713 AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0) 714 /* (V7) gpmc_ad1.gpmc_ad1 */ 715 AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0) 716 /* (R8) gpmc_ad2.gpmc_ad2 */ 717 AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0) 718 /* (T8) gpmc_ad3.gpmc_ad3 */ 719 AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0) 720 /* (U8) gpmc_ad4.gpmc_ad4 */ 721 AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0) 722 /* (V8) gpmc_ad5.gpmc_ad5 */ 723 AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0) 724 /* (R9) gpmc_ad6.gpmc_ad6 */ 725 AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0) 726 /* (T9) gpmc_ad7.gpmc_ad7 */ 727 AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0) 728 /* (T17) gpmc_wait0.gpmc_wait0 */ 729 AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0) 730 /* (U17) gpmc_wpn.gpmc_wpn */ 731 AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0) 732 /* (V6) gpmc_csn0.gpmc_csn0 */ 733 AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) 734 /* (R7) gpmc_advn_ale.gpmc_advn_ale */ 735 AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) 736 /* (T7) gpmc_oen_ren.gpmc_oen_ren */ 737 AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) 738 /* (U6) gpmc_wen.gpmc_wen */ 739 AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) 740 /* (T6) gpmc_be0n_cle.gpmc_be0n_cle */ 741 AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) 742 >; 743 }; 744 };
Cache object: 29c7f1ad1e938049db13f6a4061d20ec
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