The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/am335x-pocketbeagle.dts

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 // SPDX-License-Identifier: GPL-2.0
    2 /*
    3  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
    4  *
    5  * Author: Robert Nelson <robertcnelson@gmail.com>
    6  */
    7 /dts-v1/;
    8 
    9 #include "am33xx.dtsi"
   10 #include "am335x-osd335x-common.dtsi"
   11 
   12 / {
   13         model = "TI AM335x PocketBeagle";
   14         compatible = "ti,am335x-pocketbeagle", "ti,am335x-bone", "ti,am33xx";
   15 
   16         chosen {
   17                 stdout-path = &uart0;
   18         };
   19 
   20         leds {
   21                 pinctrl-names = "default";
   22                 pinctrl-0 = <&usr_leds_pins>;
   23 
   24                 compatible = "gpio-leds";
   25 
   26                 usr0 {
   27                         label = "beaglebone:green:usr0";
   28                         gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
   29                         linux,default-trigger = "heartbeat";
   30                         default-state = "off";
   31                 };
   32 
   33                 usr1 {
   34                         label = "beaglebone:green:usr1";
   35                         gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
   36                         linux,default-trigger = "mmc0";
   37                         default-state = "off";
   38                 };
   39 
   40                 usr2 {
   41                         label = "beaglebone:green:usr2";
   42                         gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
   43                         linux,default-trigger = "cpu0";
   44                         default-state = "off";
   45                 };
   46 
   47                 usr3 {
   48                         label = "beaglebone:green:usr3";
   49                         gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
   50                         default-state = "off";
   51                 };
   52         };
   53 
   54         vmmcsd_fixed: fixedregulator0 {
   55                 compatible = "regulator-fixed";
   56                 regulator-name = "vmmcsd_fixed";
   57                 regulator-min-microvolt = <3300000>;
   58                 regulator-max-microvolt = <3300000>;
   59         };
   60 };
   61 
   62 &gpio0 {
   63         gpio-line-names =
   64                 "NC",
   65                 "NC",
   66                 "P1.08 [SPI0_CLK]",
   67                 "P1.10 [SPI0_MISO]",
   68                 "P1.12 [SPI0_MOSI]",
   69                 "P1.06 [SPI0_CS]",
   70                 "[MMC0_CD]",
   71                 "P2.29 [SPI1_CLK]",
   72                 "[SYSBOOT 12]",
   73                 "[SYSBOOT 13]",
   74                 "[SYSBOOT 14]",
   75                 "[SYSBOOT 15]",
   76                 "P1.26 [I2C2_SDA]",
   77                 "P1.28 [I2C2_SCL]",
   78                 "P2.11 [I2C1_SDA]",
   79                 "P2.09 [I2C1_SCL]",
   80                 "NC",
   81                 "NC",
   82                 "NC",
   83                 "P2.31 [SPI1_CS]",
   84                 "P1.20 [PRU0.16]",
   85                 "NC",
   86                 "NC",
   87                 "P2.03",
   88                 "NC",
   89                 "NC",
   90                 "P1.34",
   91                 "P2.19",
   92                 "NC",
   93                 "NC",
   94                 "P2.05 [UART4_RX]",
   95                 "P2.07 [UART4_TX]";
   96 };
   97 
   98 &gpio1 {
   99         gpio-line-names =
  100                 "NC",
  101                 "NC",
  102                 "NC",
  103                 "NC",
  104                 "NC",
  105                 "NC",
  106                 "NC",
  107                 "NC",
  108                 "NC",
  109                 "P2.25 [SPI1_MOSI]",
  110                 "P1.32 [UART0_RX]",
  111                 "P1.30 [UART0_TX]",
  112                 "P2.24",
  113                 "P2.33",
  114                 "P2.22",
  115                 "P2.18",
  116                 "NC",
  117                 "NC",
  118                 "P2.01 [PWM1A]",
  119                 "NC",
  120                 "P2.10",
  121                 "[USR LED 0]",
  122                 "[USR LED 1]",
  123                 "[USR LED 2]",
  124                 "[USR LED 3]",
  125                 "P2.06",
  126                 "P2.04",
  127                 "P2.02",
  128                 "P2.08",
  129                 "NC",
  130                 "NC",
  131                 "NC";
  132 };
  133 
  134 &gpio2 {
  135         gpio-line-names =
  136                 "P2.20",
  137                 "P2.17",
  138                 "NC",
  139                 "NC",
  140                 "NC",
  141                 "[EEPROM_WP]",
  142                 "[SYSBOOT 0]",
  143                 "[SYSBOOT 1]",
  144                 "[SYSBOOT 2]",
  145                 "[SYSBOOT 3]",
  146                 "[SYSBOOT 4]",
  147                 "[SYSBOOT 5]",
  148                 "[SYSBOOT 6]",
  149                 "[SYSBOOT 7]",
  150                 "[SYSBOOT 8]",
  151                 "[SYSBOOT 9]",
  152                 "[SYSBOOT 10]",
  153                 "[SYSBOOT 11]",
  154                 "NC",
  155                 "NC",
  156                 "NC",
  157                 "NC",
  158                 "P2.35 [AIN5]",
  159                 "P1.02 [AIN6]",
  160                 "P1.35 [PRU1.10]",
  161                 "P1.04 [PRU1.11]",
  162                 "[MMC0_DAT3]",
  163                 "[MMC0_DAT2]",
  164                 "[MMC0_DAT1]",
  165                 "[MMC0_DAT0]",
  166                 "[MMC0_CLK]",
  167                 "[MMC0_CMD]";
  168 };
  169 
  170 &gpio3 {
  171         gpio-line-names =
  172                 "NC",
  173                 "NC",
  174                 "NC",
  175                 "NC",
  176                 "NC",
  177                 "[I2C0_SDA]",
  178                 "[I2C0_SCL]",
  179                 "[JTAG EMU0]",
  180                 "[JTAG EMU1]",
  181                 "NC",
  182                 "NC",
  183                 "NC",
  184                 "NC",
  185                 "P1.03 [USB1]",
  186                 "P1.36 [PWM0A]",
  187                 "P1.33 [PRU0.1]",
  188                 "P2.32 [PRU0.2]",
  189                 "P2.30 [PRU0.3]",
  190                 "P1.31 [PRU0.4]",
  191                 "P2.34 [PRU0.5]",
  192                 "P2.28 [PRU0.6]",
  193                 "P1.29 [PRU0.7]",
  194                 "NC",
  195                 "NC",
  196                 "NC",
  197                 "NC",
  198                 "NC",
  199                 "NC",
  200                 "NC",
  201                 "NC",
  202                 "NC",
  203                 "NC";
  204 };
  205 
  206 &am33xx_pinmux {
  207 
  208         compatible = "pinconf-single";
  209         pinctrl-names = "default";
  210 
  211         pinctrl-0 =   < &P2_03_gpio &P1_34_gpio &P2_19_gpio &P2_24_gpio
  212                         &P2_33_gpio &P2_22_gpio &P2_18_gpio &P2_10_gpio
  213                         &P2_06_gpio &P2_04_gpio &P2_02_gpio &P2_08_gpio
  214                         &P2_17_gpio >;
  215 
  216         /* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */
  217         P2_03_gpio: pinmux_P2_03_gpio {
  218                 pinctrl-single,pins = <
  219                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE7)
  220                 >;
  221                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  222                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  223         };
  224 
  225         /* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */
  226         P1_34_gpio: pinmux_P1_34_gpio {
  227                 pinctrl-single,pins = <
  228                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE7)
  229                 >;
  230                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  231                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  232         };
  233 
  234         /* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */
  235         P2_19_gpio: pinmux_P2_19_gpio {
  236                 pinctrl-single,pins = <
  237                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE7)
  238                 >;
  239                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  240                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  241         };
  242 
  243         /* P2_24 (ZCZ ball T12) gpio1_12 0x830 PIN 12 */
  244         P2_24_gpio: pinmux_P2_24_gpio {
  245                 pinctrl-single,pins = <
  246                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7)
  247                 >;
  248                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  249                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  250         };
  251 
  252         /* P2_33 (ZCZ ball R12) gpio1_13 0x834 PIN 13 */
  253         P2_33_gpio: pinmux_P2_33_gpio {
  254                 pinctrl-single,pins = <
  255                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7)
  256                 >;
  257                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  258                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  259         };
  260 
  261         /* P2_22 (ZCZ ball V13) gpio1_14 0x838 PIN 14 */
  262         P2_22_gpio: pinmux_P2_22_gpio {
  263                 pinctrl-single,pins = <
  264                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7)
  265                 >;
  266                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  267                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  268         };
  269 
  270         /* P2_18 (ZCZ ball U13) gpio1_15 0x83c PIN 15 */
  271         P2_18_gpio: pinmux_P2_18_gpio {
  272                 pinctrl-single,pins = <
  273                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7)
  274                 >;
  275                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  276                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  277         };
  278 
  279         /* P2_10 (ZCZ ball R14) gpio1_20 0x850 PIN 20 */
  280         P2_10_gpio: pinmux_P2_10_gpio {
  281                 pinctrl-single,pins = <
  282                         AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLUP, MUX_MODE7)
  283                 >;
  284                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  285                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  286         };
  287 
  288         /* P2_06 (ZCZ ball U16) gpio1_25 0x864 PIN 25 */
  289         P2_06_gpio: pinmux_P2_06_gpio {
  290                 pinctrl-single,pins = <
  291                         AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLUP, MUX_MODE7)
  292                 >;
  293                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  294                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  295         };
  296 
  297         /* P2_04 (ZCZ ball T16) gpio1_26 0x868 PIN 26 */
  298         P2_04_gpio: pinmux_P2_04_gpio {
  299                 pinctrl-single,pins = <
  300                         AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLUP, MUX_MODE7)
  301                 >;
  302                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  303                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  304         };
  305 
  306         /* P2_02 (ZCZ ball V17) gpio1_27 0x86c PIN 27 */
  307         P2_02_gpio: pinmux_P2_02_gpio {
  308                 pinctrl-single,pins = <
  309                         AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLUP, MUX_MODE7)
  310                 >;
  311                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  312                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  313         };
  314 
  315         /* P2_08 (ZCZ ball U18) gpio1_28 0x878 PIN 30 */
  316         P2_08_gpio: pinmux_P2_08_gpio {
  317                 pinctrl-single,pins = <
  318                         AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  319                 >;
  320                 pinctrl-single,bias-pullup   =   < 0x00  0x10  0x00  0x18>;
  321                 pinctrl-single,bias-pulldown   = < 0x00  0x00  0x10  0x18>;
  322         };
  323 
  324         /* P2_17 (ZCZ ball V12) gpio2_1 0x88c PIN 35 */
  325         P2_17_gpio: pinmux_P2_17_gpio {
  326                 pinctrl-single,pins = <
  327                         AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE7)
  328                 >;
  329                 pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
  330                 pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
  331         };
  332 
  333         i2c2_pins: pinmux-i2c2-pins {
  334                 pinctrl-single,pins = <
  335                         AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3)      /* (D17) uart1_rtsn.I2C2_SCL */
  336                         AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3)      /* (D18) uart1_ctsn.I2C2_SDA */
  337                 >;
  338         };
  339 
  340         ehrpwm0_pins: pinmux-ehrpwm0-pins {
  341                 pinctrl-single,pins = <
  342                         AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
  343                 >;
  344         };
  345 
  346         ehrpwm1_pins: pinmux-ehrpwm1-pins {
  347                 pinctrl-single,pins = <
  348                         AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE6)      /* (U14) gpmc_a2.ehrpwm1A */
  349                 >;
  350         };
  351 
  352         mmc0_pins: pinmux-mmc0-pins {
  353                 pinctrl-single,pins = <
  354                         AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)               /* (C15) spi0_cs1.gpio0[6] */
  355                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
  356                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
  357                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
  358                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
  359                         AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
  360                         AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
  361                 >;
  362         };
  363 
  364         spi0_pins: pinmux-spi0-pins {
  365                 pinctrl-single,pins = <
  366                         AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
  367                         AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
  368                         AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
  369                         AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
  370                 >;
  371         };
  372 
  373         spi1_pins: pinmux-spi1-pins {
  374                 pinctrl-single,pins = <
  375                         AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE4)       /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
  376                         AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE4)      /* (E18) uart0_ctsn.spi1_d0 */
  377                         AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE4)      /* (E17) uart0_rtsn.spi1_d1 */
  378                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE4)        /* (A15) xdma_event_intr0.spi1_cs1 */
  379                 >;
  380         };
  381 
  382         usr_leds_pins: pinmux-usr-leds-pins {
  383                 pinctrl-single,pins = <
  384                         AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7)               /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
  385                         AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7)               /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
  386                         AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7)               /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
  387                         AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7)               /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
  388                 >;
  389         };
  390 
  391         uart0_pins: pinmux-uart0-pins {
  392                 pinctrl-single,pins = <
  393                         AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
  394                         AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  395                 >;
  396         };
  397 
  398         uart4_pins: pinmux-uart4-pins {
  399                 pinctrl-single,pins = <
  400                         AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6)      /* (T17) gpmc_wait0.uart4_rxd */
  401                         AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6)     /* (U17) gpmc_wpn.uart4_txd */
  402                 >;
  403         };
  404 };
  405 
  406 &epwmss0 {
  407         status = "okay";
  408 };
  409 
  410 &ehrpwm0 {
  411         status = "okay";
  412         pinctrl-names = "default";
  413         pinctrl-0 = <&ehrpwm0_pins>;
  414 };
  415 
  416 &epwmss1 {
  417         status = "okay";
  418 };
  419 
  420 &ehrpwm1 {
  421         status = "okay";
  422         pinctrl-names = "default";
  423         pinctrl-0 = <&ehrpwm1_pins>;
  424 };
  425 
  426 &i2c0 {
  427         eeprom: eeprom@50 {
  428                 compatible = "atmel,24c256";
  429                 reg = <0x50>;
  430         };
  431 };
  432 
  433 &i2c2 {
  434         pinctrl-names = "default";
  435         pinctrl-0 = <&i2c2_pins>;
  436 
  437         status = "okay";
  438         clock-frequency = <400000>;
  439 };
  440 
  441 &mmc1 {
  442         status = "okay";
  443         vmmc-supply = <&vmmcsd_fixed>;
  444         bus-width = <4>;
  445         pinctrl-names = "default";
  446         pinctrl-0 = <&mmc0_pins>;
  447         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  448 };
  449 
  450 &rtc {
  451         system-power-controller;
  452 };
  453 
  454 &tscadc {
  455         status = "okay";
  456         adc {
  457                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
  458                 ti,chan-step-avg = <16 16 16 16 16 16 16 16>;
  459                 ti,chan-step-opendelay = <0x98 0x98 0x98 0x98 0x98 0x98 0x98 0x98>;
  460                 ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
  461         };
  462 };
  463 
  464 &uart0 {
  465         pinctrl-names = "default";
  466         pinctrl-0 = <&uart0_pins>;
  467 
  468         status = "okay";
  469 };
  470 
  471 &uart4 {
  472         pinctrl-names = "default";
  473         pinctrl-0 = <&uart4_pins>;
  474 
  475         status = "okay";
  476 };
  477 
  478 &usb0 {
  479         dr_mode = "otg";
  480 };
  481 
  482 &usb1 {
  483         dr_mode = "host";
  484 };

Cache object: 6af307d3084dcf8eb21fcd6cf9ee5e21


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.