Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/am3517-som.dtsi
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1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2016 Derald D. Woods <woods.technical@gmail.com> 4 * 5 * Based on am3517-evm.dts 6 */ 7 8 / { 9 cpus { 10 cpu@0 { 11 cpu0-supply = <&vdd_core_reg>; 12 }; 13 }; 14 15 wl12xx_buffer: wl12xx_buf { 16 compatible = "regulator-fixed"; 17 regulator-name = "wl1271_buf"; 18 regulator-min-microvolt = <1800000>; 19 regulator-max-microvolt = <1800000>; 20 pinctrl-names = "default"; 21 pinctrl-0 = <&wl12xx_buffer_pins>; 22 gpio = <&gpio5 1 GPIO_ACTIVE_LOW>; /* gpio 129 */ 23 regulator-always-on; 24 vin-supply = <&vdd_1v8_reg>; 25 }; 26 27 wl12xx_vmmc2: wl12xx_vmmc2 { 28 compatible = "regulator-fixed"; 29 regulator-name = "vwl1271"; 30 regulator-min-microvolt = <1800000>; 31 regulator-max-microvolt = <1800000>; 32 pinctrl-names = "default"; 33 pinctrl-0 = <&wl12xx_wkup_pins>; 34 gpio = <&gpio1 3 GPIO_ACTIVE_HIGH >; /* gpio 3 */ 35 startup-delay-us = <70000>; 36 enable-active-high; 37 regulator-always-on; 38 vin-supply = <&wl12xx_buffer>; 39 }; 40 }; 41 42 &gpmc { 43 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */ 44 45 nand@0,0 { 46 compatible = "ti,omap2-nand"; 47 linux,mtd-name = "micron,mt29f4g16abchch"; 48 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 49 nand-bus-width = <16>; 50 ti,nand-ecc-opt = "bch8"; 51 gpmc,sync-clk-ps = <0>; 52 gpmc,cs-on-ns = <0>; 53 gpmc,cs-rd-off-ns = <44>; 54 gpmc,cs-wr-off-ns = <44>; 55 gpmc,adv-on-ns = <6>; 56 gpmc,adv-rd-off-ns = <34>; 57 gpmc,adv-wr-off-ns = <44>; 58 gpmc,we-off-ns = <40>; 59 gpmc,oe-off-ns = <54>; 60 gpmc,access-ns = <64>; 61 gpmc,rd-cycle-ns = <82>; 62 gpmc,wr-cycle-ns = <82>; 63 gpmc,wr-access-ns = <40>; 64 gpmc,wr-data-mux-bus-ns = <0>; 65 gpmc,device-width = <2>; 66 #address-cells = <1>; 67 #size-cells = <1>; 68 }; 69 }; 70 71 &i2c1 { 72 pinctrl-names = "default"; 73 pinctrl-0 = <&i2c1_pins>; 74 clock-frequency = <400000>; 75 76 s35390a: s35390a@30 { 77 compatible = "sii,s35390a"; 78 reg = <0x30>; 79 80 pinctrl-names = "default"; 81 pinctrl-0 = <&rtc_pins>; 82 interrupts-extended = <&gpio2 23 IRQ_TYPE_EDGE_FALLING>; /* gpio_55 */ 83 }; 84 85 tps: tps65023@48 { 86 compatible = "ti,tps65023"; 87 reg = <0x48>; 88 89 regulators { 90 vdd_core_reg: VDCDC1 { 91 regulator-name = "vdd_core"; 92 regulator-always-on; 93 regulator-min-microvolt = <1200000>; 94 regulator-max-microvolt = <1200000>; 95 }; 96 97 vdd_io_reg: VDCDC2 { 98 regulator-name = "vdd_io"; 99 regulator-always-on; 100 regulator-min-microvolt = <3300000>; 101 regulator-max-microvolt = <3300000>; 102 }; 103 104 vdd_1v8_reg: VDCDC3 { 105 regulator-name = "vdd_1v8"; 106 regulator-always-on; 107 regulator-min-microvolt = <1800000>; 108 regulator-max-microvolt = <1800000>; 109 }; 110 111 vdd_usb18_reg: LDO1 { 112 regulator-name = "vdd_usb18"; 113 regulator-always-on; 114 regulator-min-microvolt = <1800000>; 115 regulator-max-microvolt = <1800000>; 116 }; 117 118 vdd_usb33_reg: LDO2 { 119 regulator-name = "vdd_usb33"; 120 regulator-always-on; 121 regulator-min-microvolt = <3300000>; 122 regulator-max-microvolt = <3300000>; 123 }; 124 }; 125 }; 126 127 touchscreen: tsc2004@4b { 128 compatible = "ti,tsc2004"; 129 reg = <0x4b>; 130 131 vio-supply = <&vdd_io_reg>; 132 133 pinctrl-names = "default"; 134 pinctrl-0 = <&tsc2004_pins>; 135 interrupts-extended = <&gpio3 1 IRQ_TYPE_EDGE_RISING>; /* gpio_65 */ 136 137 touchscreen-fuzz-x = <4>; 138 touchscreen-fuzz-y = <7>; 139 touchscreen-fuzz-pressure = <2>; 140 touchscreen-size-x = <480>; 141 touchscreen-size-y = <272>; 142 touchscreen-max-pressure = <2048>; 143 144 ti,x-plate-ohms = <280>; 145 ti,esd-recovery-timeout-ms = <8000>; 146 }; 147 }; 148 149 &mmc2 { 150 interrupts-extended = <&intc 86 /* &omap3_pmx_core 0x12c */>; 151 152 status = "okay"; 153 pinctrl-names = "default"; 154 pinctrl-0 = <&mmc2_pins>; 155 vmmc-supply = <&wl12xx_vmmc2>; 156 non-removable; 157 bus-width = <4>; 158 cap-power-off-card; 159 #address-cells = <1>; 160 #size-cells = <0>; 161 wlcore: wlcore@2 { 162 compatible = "ti,wl1271"; 163 reg = <2>; 164 interrupt-parent = <&gpio6>; 165 interrupts = <10 IRQ_TYPE_EDGE_RISING>; /* gpio_170 */ 166 ref-clock-frequency = <26000000>; 167 tcxo-clock-frequency = <26000000>; 168 }; 169 }; 170 171 &uart2 { 172 pinctrl-names = "default"; 173 pinctrl-0 = <&uart2_pins>; 174 175 bluetooth { 176 compatible = "ti,wl1271-st"; 177 enable-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; /* gpio 56 */ 178 max-speed = <3000000>; 179 }; 180 }; 181 182 &omap3_pmx_core { 183 184 i2c1_pins: pinmux_i2c1_pins { 185 pinctrl-single,pins = < 186 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ 187 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ 188 >; 189 }; 190 191 wl12xx_buffer_pins: pinmux_wl12xx_buffer_pins { 192 pinctrl-single,pins = < 193 OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4) /* mmc1_dat7.gpio_129 */ 194 >; 195 }; 196 197 mmc2_pins: pinmux_mmc2_pins { 198 pinctrl-single,pins = < 199 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_clk.mmc2_clk */ 200 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_cmd.mmc2_cmd */ 201 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat0.mmc2_dat0 */ 202 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat1.mmc2_dat1 */ 203 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat2.mmc2_dat2 */ 204 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat3.mmc2_dat3 */ 205 OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat4.mmc2_dir_dat0 */ 206 OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat5.mmc2_dir_dat1 */ 207 OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat6.mmc2_dir_cmd */ 208 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* mmc2_dat7.mmc2_clkin */ 209 OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE4) /* hdq_sio.gpio_170 */ 210 >; 211 }; 212 213 rtc_pins: pinmux_rtc_pins { 214 pinctrl-single,pins = < 215 OMAP3_CORE1_IOPAD(0x20b6, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs4.gpio_55 */ 216 >; 217 }; 218 219 tsc2004_pins: pinmux_tsc2004_pins { 220 pinctrl-single,pins = < 221 OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT | MUX_MODE4) /* gpmc_wait3.gpio_65 */ 222 >; 223 }; 224 225 uart2_pins: pinmux_uart2_pins { 226 pinctrl-single,pins = < 227 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */ 228 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLUP | MUX_MODE0) /* uart2_rts */ 229 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */ 230 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */ 231 OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT | MUX_MODE0) /* gpio_56 */ 232 >; 233 }; 234 }; 235 236 &omap3_pmx_wkup { 237 238 wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins { 239 pinctrl-single,pins = < 240 OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */ 241 >; 242 }; 243 };
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