The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/am3517.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0-only
    2 /*
    3  * Device Tree Source for am3517 SoC
    4  *
    5  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
    6  */
    7 
    8 #include "omap3.dtsi"
    9 
   10 /* AM3517 doesn't appear to have the crypto engines defined in omap3.dtsi */
   11 /delete-node/ &aes1_target;
   12 /delete-node/ &aes2_target;
   13 
   14 / {
   15         aliases {
   16                 serial3 = &uart4;
   17                 can = &hecc;
   18         };
   19 
   20         cpus {
   21                 cpu: cpu@0 {
   22                         /* Based on OMAP3630 variants OPP50 and OPP100 */
   23                         operating-points-v2 = <&cpu0_opp_table>;
   24 
   25                         clock-latency = <300000>; /* From legacy driver */
   26                 };
   27         };
   28 
   29         cpu0_opp_table: opp-table {
   30                 compatible = "operating-points-v2-ti-cpu";
   31                 syscon = <&scm_conf>;
   32                 /*
   33                  * AM3517 TRM only lists 600MHz @ 1.2V, but omap36xx
   34                  * appear to operate at 300MHz as well. Since AM3517 only
   35                  * lists one operating voltage, it will remain fixed at 1.2V
   36                  */
   37                 opp50-300000000 {
   38                         opp-hz = /bits/ 64 <300000000>;
   39                         opp-microvolt = <1200000>;
   40                         opp-supported-hw = <0xffffffff 0xffffffff>;
   41                         opp-suspend;
   42                 };
   43 
   44                 opp100-600000000 {
   45                         opp-hz = /bits/ 64 <600000000>;
   46                         opp-microvolt = <1200000>;
   47                         opp-supported-hw = <0xffffffff 0xffffffff>;
   48                 };
   49         };
   50 
   51         ocp@68000000 {
   52                 am35x_otg_hs: am35x_otg_hs@5c040000 {
   53                         compatible = "ti,omap3-musb";
   54                         ti,hwmods = "am35x_otg_hs";
   55                         status = "disabled";
   56                         reg = <0x5c040000 0x1000>;
   57                         interrupts = <71>;
   58                         interrupt-names = "mc";
   59                 };
   60 
   61                 davinci_emac: ethernet@5c000000 {
   62                         compatible = "ti,am3517-emac";
   63                         ti,hwmods = "davinci_emac";
   64                         status = "disabled";
   65                         reg = <0x5c000000 0x30000>;
   66                         interrupts = <67 68 69 70>;
   67                         syscon = <&scm_conf>;
   68                         ti,davinci-ctrl-reg-offset = <0x10000>;
   69                         ti,davinci-ctrl-mod-reg-offset = <0>;
   70                         ti,davinci-ctrl-ram-offset = <0x20000>;
   71                         ti,davinci-ctrl-ram-size = <0x2000>;
   72                         ti,davinci-rmii-en = /bits/ 8 <1>;
   73                         local-mac-address = [ 00 00 00 00 00 00 ];
   74                         clocks = <&emac_ick>;
   75                         clock-names = "ick";
   76                 };
   77 
   78                 davinci_mdio: mdio@5c030000 {
   79                         compatible = "ti,davinci_mdio";
   80                         ti,hwmods = "davinci_mdio";
   81                         status = "disabled";
   82                         reg = <0x5c030000 0x1000>;
   83                         bus_freq = <1000000>;
   84                         #address-cells = <1>;
   85                         #size-cells = <0>;
   86                         clocks = <&emac_fck>;
   87                         clock-names = "fck";
   88                 };
   89 
   90                 uart4: serial@4809e000 {
   91                         compatible = "ti,omap3-uart";
   92                         ti,hwmods = "uart4";
   93                         status = "disabled";
   94                         reg = <0x4809e000 0x400>;
   95                         interrupts = <84>;
   96                         dmas = <&sdma 55 &sdma 54>;
   97                         dma-names = "tx", "rx";
   98                         clock-frequency = <48000000>;
   99                 };
  100 
  101                 omap3_pmx_core2: pinmux@480025d8 {
  102                         compatible = "ti,omap3-padconf", "pinctrl-single";
  103                         reg = <0x480025d8 0x24>;
  104                         #address-cells = <1>;
  105                         #size-cells = <0>;
  106                         #pinctrl-cells = <1>;
  107                         #interrupt-cells = <1>;
  108                         interrupt-controller;
  109                         pinctrl-single,register-width = <16>;
  110                         pinctrl-single,function-mask = <0xff1f>;
  111                 };
  112 
  113                 hecc: can@5c050000 {
  114                         compatible = "ti,am3517-hecc";
  115                         status = "disabled";
  116                         reg = <0x5c050000 0x80>,
  117                               <0x5c053000 0x180>,
  118                               <0x5c052000 0x200>;
  119                         reg-names = "hecc", "hecc-ram", "mbx";
  120                         interrupts = <24>;
  121                         clocks = <&hecc_ck>;
  122                 };
  123 
  124                 /*
  125                  * On am3517 the OCP registers do not seem to be accessible
  126                  * similar to the omap34xx. Maybe SGX is permanently set to
  127                  * "OCP bypass mode", or maybe there is OCP_SYSCONFIG that is
  128                  * write-only at 0x50000e10. We detect SGX based on the SGX
  129                  * revision register instead of the unreadable OCP revision
  130                  * register.
  131                  */
  132                 sgx_module: target-module@50000000 {
  133                         compatible = "ti,sysc-omap2", "ti,sysc";
  134                         reg = <0x50000014 0x4>;
  135                         reg-names = "rev";
  136                         clocks = <&sgx_fck>, <&sgx_ick>;
  137                         clock-names = "fck", "ick";
  138                         #address-cells = <1>;
  139                         #size-cells = <1>;
  140                         ranges = <0 0x50000000 0x4000>;
  141 
  142                         /*
  143                          * Closed source PowerVR driver, no child device
  144                          * binding or driver in mainline
  145                          */
  146                 };
  147         };
  148 };
  149 
  150 /* Not currently working, probably needs at least different clocks */
  151 &rng_target {
  152         status = "disabled";
  153         /delete-property/ clocks;
  154 };
  155 
  156 /* Table Table 5-79 of the TRM shows 480ab000 is reserved */
  157 &usb_otg_hs {
  158         status = "disabled";
  159 };
  160 
  161 &iva {
  162         status = "disabled";
  163 };
  164 
  165 &mailbox {
  166         status = "disabled";
  167 };
  168 
  169 &mmu_isp {
  170         status = "disabled";
  171 };
  172 
  173 #include "am35xx-clocks.dtsi"
  174 #include "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
  175 
  176 /* Preferred always-on timer for clocksource */
  177 &timer1_target {
  178         ti,no-reset-on-init;
  179         ti,no-idle;
  180         timer@0 {
  181                 assigned-clocks = <&gpt1_fck>;
  182                 assigned-clock-parents = <&sys_ck>;
  183         };
  184 };
  185 
  186 /* Preferred timer for clockevent */
  187 &timer2_target {
  188         ti,no-reset-on-init;
  189         ti,no-idle;
  190         timer@0 {
  191                 assigned-clocks = <&gpt2_fck>;
  192                 assigned-clock-parents = <&sys_ck>;
  193         };
  194 };

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