Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/am57xx-idk-common.dtsi
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1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ 4 */ 5 6 #include "am57xx-industrial-grade.dtsi" 7 8 / { 9 aliases { 10 rtc0 = &tps659038_rtc; 11 rtc1 = &rtc; 12 display0 = &hdmi0; 13 }; 14 15 chosen { 16 stdout-path = &uart3; 17 }; 18 19 vmain: fixedregulator-vmain { 20 compatible = "regulator-fixed"; 21 regulator-name = "VMAIN"; 22 regulator-min-microvolt = <5000000>; 23 regulator-max-microvolt = <5000000>; 24 regulator-always-on; 25 regulator-boot-on; 26 }; 27 28 v3_3d: fixedregulator-v3_3d { 29 compatible = "regulator-fixed"; 30 regulator-name = "V3_3D"; 31 vin-supply = <&smps9_reg>; 32 regulator-min-microvolt = <3300000>; 33 regulator-max-microvolt = <3300000>; 34 regulator-always-on; 35 regulator-boot-on; 36 }; 37 38 v1_2d: fixedregulator-v1_2d { 39 compatible = "regulator-fixed"; 40 regulator-name = "V1_2D"; 41 vin-supply = <&vmain>; 42 regulator-min-microvolt = <1200000>; 43 regulator-max-microvolt = <1200000>; 44 regulator-always-on; 45 regulator-boot-on; 46 }; 47 48 vtt_fixed: fixedregulator-vtt { 49 /* TPS51200 */ 50 compatible = "regulator-fixed"; 51 regulator-name = "vtt_fixed"; 52 vin-supply = <&v3_3d>; 53 regulator-min-microvolt = <3300000>; 54 regulator-max-microvolt = <3300000>; 55 regulator-always-on; 56 regulator-boot-on; 57 }; 58 59 leds-iio { 60 status = "disabled"; 61 compatible = "gpio-leds"; 62 led-out0 { 63 label = "out0"; 64 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>; 65 default-state = "off"; 66 }; 67 68 led-out1 { 69 label = "out1"; 70 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>; 71 default-state = "off"; 72 }; 73 74 led-out2 { 75 label = "out2"; 76 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>; 77 default-state = "off"; 78 }; 79 80 led-out3 { 81 label = "out3"; 82 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>; 83 default-state = "off"; 84 }; 85 86 led-out4 { 87 label = "out4"; 88 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>; 89 default-state = "off"; 90 }; 91 92 led-out5 { 93 label = "out5"; 94 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>; 95 default-state = "off"; 96 }; 97 98 led-out6 { 99 label = "out6"; 100 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>; 101 default-state = "off"; 102 }; 103 104 led-out7 { 105 label = "out7"; 106 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>; 107 default-state = "off"; 108 }; 109 }; 110 111 hdmi0: connector@0 { 112 compatible = "hdmi-connector"; 113 label = "hdmi"; 114 115 type = "a"; 116 117 port { 118 hdmi_connector_in: endpoint { 119 remote-endpoint = <&tpd12s015_out>; 120 }; 121 }; 122 }; 123 124 tpd12s015: encoder@0 { 125 compatible = "ti,tpd12s016", "ti,tpd12s015"; 126 127 gpios = <0>, /* optional CT_CP_HPD */ 128 <0>, /* optional LS_OE */ 129 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* HPD */ 130 131 ports { 132 #address-cells = <1>; 133 #size-cells = <0>; 134 135 port@0 { 136 reg = <0>; 137 138 tpd12s015_in: endpoint@0 { 139 remote-endpoint = <&hdmi_out>; 140 }; 141 }; 142 143 port@1 { 144 reg = <1>; 145 146 tpd12s015_out: endpoint@0 { 147 remote-endpoint = <&hdmi_connector_in>; 148 }; 149 }; 150 }; 151 }; 152 153 src_clk_x1: src_clk_x1 { 154 #clock-cells = <0>; 155 compatible = "fixed-clock"; 156 clock-frequency = <20000000>; 157 }; 158 }; 159 160 &dra7_pmx_core { 161 dcan1_pins_default: dcan1_pins_default { 162 pinctrl-single,pins = < 163 DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */ 164 DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0) /* dcan1_rx */ 165 >; 166 }; 167 168 dcan1_pins_sleep: dcan1_pins_sleep { 169 pinctrl-single,pins = < 170 DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */ 171 DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */ 172 >; 173 }; 174 }; 175 176 &i2c1 { 177 status = "okay"; 178 clock-frequency = <400000>; 179 180 tps659038: tps659038@58 { 181 compatible = "ti,tps659038"; 182 reg = <0x58>; 183 interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH 184 &dra7_pmx_core 0x418>; 185 #interrupt-cells = <2>; 186 interrupt-controller; 187 ti,system-power-controller; 188 ti,palmas-override-powerhold; 189 190 tps659038_pmic { 191 compatible = "ti,tps659038-pmic"; 192 193 smps12-in-supply = <&vmain>; 194 smps3-in-supply = <&vmain>; 195 smps45-in-supply = <&vmain>; 196 smps6-in-supply = <&vmain>; 197 smps7-in-supply = <&vmain>; 198 smps8-in-supply = <&vmain>; 199 smps9-in-supply = <&vmain>; 200 ldo1-in-supply = <&vmain>; 201 ldo2-in-supply = <&vmain>; 202 ldo3-in-supply = <&vmain>; 203 ldo4-in-supply = <&vmain>; 204 ldo9-in-supply = <&vmain>; 205 ldoln-in-supply = <&vmain>; 206 ldousb-in-supply = <&vmain>; 207 ldortc-in-supply = <&vmain>; 208 209 regulators { 210 smps12_reg: smps12 { 211 /* VDD_MPU */ 212 regulator-name = "smps12"; 213 regulator-min-microvolt = <850000>; 214 regulator-max-microvolt = <1250000>; 215 regulator-always-on; 216 regulator-boot-on; 217 }; 218 219 smps3_reg: smps3 { 220 /* VDD_DDR EMIF1 EMIF2 */ 221 regulator-name = "smps3"; 222 regulator-min-microvolt = <1350000>; 223 regulator-max-microvolt = <1350000>; 224 regulator-always-on; 225 regulator-boot-on; 226 }; 227 228 smps45_reg: smps45 { 229 /* VDD_DSPEVE on AM572 */ 230 /* VDD_IVA + VDD_DSP on AM571 */ 231 regulator-name = "smps45"; 232 regulator-min-microvolt = <850000>; 233 regulator-max-microvolt = <1250000>; 234 regulator-always-on; 235 regulator-boot-on; 236 }; 237 238 smps6_reg: smps6 { 239 /* VDD_GPU */ 240 regulator-name = "smps6"; 241 regulator-min-microvolt = <850000>; 242 regulator-max-microvolt = <1250000>; 243 regulator-always-on; 244 regulator-boot-on; 245 }; 246 247 smps7_reg: smps7 { 248 /* VDD_CORE */ 249 regulator-name = "smps7"; 250 regulator-min-microvolt = <850000>; 251 regulator-max-microvolt = <1150000>; 252 regulator-always-on; 253 regulator-boot-on; 254 }; 255 256 smps8_reg: smps8 { 257 /* 5728 - VDD_IVAHD */ 258 /* 5718 - N.C. test point */ 259 regulator-name = "smps8"; 260 }; 261 262 smps9_reg: smps9 { 263 /* VDD_3_3D */ 264 regulator-name = "smps9"; 265 regulator-min-microvolt = <3300000>; 266 regulator-max-microvolt = <3300000>; 267 regulator-always-on; 268 regulator-boot-on; 269 }; 270 271 ldo1_reg: ldo1 { 272 /* VDDSHV8 - VSDMMC */ 273 /* NOTE: on rev 1.3a, data supply */ 274 regulator-name = "ldo1"; 275 regulator-min-microvolt = <1800000>; 276 regulator-max-microvolt = <3300000>; 277 regulator-boot-on; 278 regulator-always-on; 279 }; 280 281 ldo2_reg: ldo2 { 282 /* VDDSH18V */ 283 regulator-name = "ldo2"; 284 regulator-min-microvolt = <1800000>; 285 regulator-max-microvolt = <1800000>; 286 regulator-always-on; 287 regulator-boot-on; 288 }; 289 290 ldo3_reg: ldo3 { 291 /* R1.3a 572x V1_8PHY_LDO3: USB, SATA */ 292 regulator-name = "ldo3"; 293 regulator-min-microvolt = <1800000>; 294 regulator-max-microvolt = <1800000>; 295 regulator-always-on; 296 regulator-boot-on; 297 }; 298 299 ldo4_reg: ldo4 { 300 /* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/ 301 regulator-name = "ldo4"; 302 regulator-min-microvolt = <1800000>; 303 regulator-max-microvolt = <1800000>; 304 regulator-always-on; 305 regulator-boot-on; 306 }; 307 308 /* LDO5-8 unused */ 309 310 ldo9_reg: ldo9 { 311 /* VDD_RTC */ 312 regulator-name = "ldo9"; 313 regulator-min-microvolt = <840000>; 314 regulator-max-microvolt = <1160000>; 315 regulator-always-on; 316 regulator-boot-on; 317 }; 318 319 ldoln_reg: ldoln { 320 /* VDDA_1V8_PLL */ 321 regulator-name = "ldoln"; 322 regulator-min-microvolt = <1800000>; 323 regulator-max-microvolt = <1800000>; 324 regulator-always-on; 325 regulator-boot-on; 326 }; 327 328 ldousb_reg: ldousb { 329 /* VDDA_3V_USB: VDDA_USBHS33 */ 330 regulator-name = "ldousb"; 331 regulator-min-microvolt = <3300000>; 332 regulator-max-microvolt = <3300000>; 333 regulator-always-on; 334 regulator-boot-on; 335 }; 336 337 ldortc_reg: ldortc { 338 /* VDDA_RTC */ 339 regulator-name = "ldortc"; 340 regulator-min-microvolt = <1800000>; 341 regulator-max-microvolt = <1800000>; 342 regulator-always-on; 343 regulator-boot-on; 344 }; 345 346 regen1: regen1 { 347 /* VDD_3V3_ON */ 348 regulator-name = "regen1"; 349 regulator-boot-on; 350 regulator-always-on; 351 }; 352 353 regen2: regen2 { 354 /* Needed for PMIC internal resource */ 355 regulator-name = "regen2"; 356 regulator-boot-on; 357 regulator-always-on; 358 }; 359 }; 360 }; 361 362 tps659038_rtc: tps659038_rtc { 363 compatible = "ti,palmas-rtc"; 364 interrupt-parent = <&tps659038>; 365 interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 366 wakeup-source; 367 }; 368 369 tps659038_pwr_button: tps659038_pwr_button { 370 compatible = "ti,palmas-pwrbutton"; 371 interrupt-parent = <&tps659038>; 372 interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 373 wakeup-source; 374 ti,palmas-long-press-seconds = <12>; 375 }; 376 377 tps659038_gpio: tps659038_gpio { 378 compatible = "ti,palmas-gpio"; 379 gpio-controller; 380 #gpio-cells = <2>; 381 }; 382 383 extcon_usb2: tps659038_usb { 384 compatible = "ti,palmas-usb-vid"; 385 ti,enable-vbus-detection; 386 ti,enable-id-detection; 387 /* ID & VBUS GPIOs provided in board dts */ 388 }; 389 }; 390 391 tpic2810: tpic2810@60 { 392 compatible = "ti,tpic2810"; 393 reg = <0x60>; 394 gpio-controller; 395 #gpio-cells = <2>; 396 }; 397 398 dsi_bridge: tc358778@e { 399 compatible = "toshiba,tc358778", "toshiba,tc358768"; 400 reg = <0xe>; 401 status = "disabled"; 402 403 clocks = <&src_clk_x1>; 404 clock-names = "refclk"; 405 406 vddc-supply = <&v1_2d>; 407 vddmipi-supply = <&v1_2d>; 408 vddio-supply = <&v3_3d>; 409 410 dsi_bridge_ports: ports { 411 #address-cells = <1>; 412 #size-cells = <0>; 413 414 port@0 { 415 reg = <0>; 416 rgb_in: endpoint { 417 remote-endpoint = <&dpi_out>; 418 data-lines = <24>; 419 }; 420 }; 421 }; 422 }; 423 }; 424 425 &mcspi3 { 426 status = "okay"; 427 ti,pindir-d0-out-d1-in; 428 429 sn65hvs882: sn65hvs882@0 { 430 compatible = "pisosr-gpio"; 431 gpio-controller; 432 #gpio-cells = <2>; 433 434 reg = <0>; 435 spi-max-frequency = <1000000>; 436 spi-cpol; 437 }; 438 }; 439 440 &uart3 { 441 status = "okay"; 442 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH 443 &dra7_pmx_core 0x248>; 444 }; 445 446 &rtc { 447 status = "okay"; 448 ext-clk-src; 449 }; 450 451 &mac_sw { 452 status = "okay"; 453 }; 454 455 &cpsw_port1 { 456 phy-handle = <ðphy0>; 457 phy-mode = "rgmii-rxid"; 458 ti,dual-emac-pvid = <1>; 459 }; 460 461 &cpsw_port2 { 462 phy-handle = <ðphy1>; 463 phy-mode = "rgmii-rxid"; 464 ti,dual-emac-pvid = <2>; 465 }; 466 467 &davinci_mdio_sw { 468 ethphy0: ethernet-phy@0 { 469 reg = <0>; 470 }; 471 472 ethphy1: ethernet-phy@1 { 473 reg = <1>; 474 }; 475 }; 476 477 &usb2_phy1 { 478 phy-supply = <&ldousb_reg>; 479 }; 480 481 &usb2_phy2 { 482 phy-supply = <&ldousb_reg>; 483 }; 484 485 &usb1 { 486 dr_mode = "host"; 487 }; 488 489 &omap_dwc3_2 { 490 extcon = <&extcon_usb2>; 491 }; 492 493 &usb2 { 494 extcon = <&extcon_usb2>; 495 dr_mode = "otg"; 496 }; 497 498 &mmc1 { 499 status = "okay"; 500 vmmc-supply = <&v3_3d>; 501 vqmmc-supply = <&ldo1_reg>; 502 bus-width = <4>; 503 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */ 504 no-1-8-v; 505 }; 506 507 &mmc2 { 508 status = "okay"; 509 vmmc-supply = <&v3_3d>; 510 vqmmc-supply = <&v3_3d>; 511 bus-width = <8>; 512 non-removable; 513 max-frequency = <96000000>; 514 no-1-8-v; 515 }; 516 517 &dcan1 { 518 status = "okay"; 519 pinctrl-names = "default", "sleep", "active"; 520 pinctrl-0 = <&dcan1_pins_sleep>; 521 pinctrl-1 = <&dcan1_pins_sleep>; 522 pinctrl-2 = <&dcan1_pins_default>; 523 }; 524 525 &qspi { 526 status = "okay"; 527 528 spi-max-frequency = <76800000>; 529 flash@0 { 530 compatible = "s25fl256s1", "jedec,spi-nor"; 531 spi-max-frequency = <76800000>; 532 reg = <0>; 533 spi-tx-bus-width = <1>; 534 spi-rx-bus-width = <4>; 535 #address-cells = <1>; 536 #size-cells = <1>; 537 538 /* MTD partition table. 539 * The ROM checks the first four physical blocks 540 * for a valid file to boot and the flash here is 541 * 64KiB block size. 542 */ 543 partition@0 { 544 label = "QSPI.SPL"; 545 reg = <0x00000000 0x000040000>; 546 }; 547 partition@1 { 548 label = "QSPI.u-boot"; 549 reg = <0x00040000 0x00100000>; 550 }; 551 partition@2 { 552 label = "QSPI.u-boot-spl-os"; 553 reg = <0x00140000 0x00080000>; 554 }; 555 partition@3 { 556 label = "QSPI.u-boot-env"; 557 reg = <0x001c0000 0x00010000>; 558 }; 559 partition@4 { 560 label = "QSPI.u-boot-env.backup1"; 561 reg = <0x001d0000 0x0010000>; 562 }; 563 partition@5 { 564 label = "QSPI.kernel"; 565 reg = <0x001e0000 0x0800000>; 566 }; 567 partition@6 { 568 label = "QSPI.file-system"; 569 reg = <0x009e0000 0x01620000>; 570 }; 571 }; 572 }; 573 574 &cpu0 { 575 vdd-supply = <&smps12_reg>; 576 }; 577 578 &hdmi { 579 status = "okay"; 580 581 vdda-supply = <&ldo4_reg>; 582 583 port { 584 hdmi_out: endpoint { 585 remote-endpoint = <&tpd12s015_in>; 586 }; 587 }; 588 }; 589 590 &dss { 591 status = "okay"; 592 593 vdda_video-supply = <&ldoln_reg>; 594 595 ports { 596 #address-cells = <1>; 597 #size-cells = <0>; 598 599 port@0 { 600 reg = <0>; 601 602 dpi_out: endpoint { 603 remote-endpoint = <&rgb_in>; 604 data-lines = <24>; 605 }; 606 }; 607 }; 608 };
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