The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/arm-realview-eb-11mp.dts

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    1 /*
    2  * Copyright 2016 Linaro Ltd
    3  *
    4  * Permission is hereby granted, free of charge, to any person obtaining a copy
    5  * of this software and associated documentation files (the "Software"), to deal
    6  * in the Software without restriction, including without limitation the rights
    7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    8  * copies of the Software, and to permit persons to whom the Software is
    9  * furnished to do so, subject to the following conditions:
   10  *
   11  * The above copyright notice and this permission notice shall be included in
   12  * all copies or substantial portions of the Software.
   13  *
   14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
   17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
   19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
   20  * THE SOFTWARE.
   21  */
   22 
   23 /dts-v1/;
   24 #include "arm-realview-eb-mp.dtsi"
   25 
   26 / {
   27         model = "ARM RealView Emulation Baseboard with ARM11MPCore Rev C Core Tile";
   28         arm,hbi = <0x146>;
   29 
   30         /*
   31          * This is the ARM11 MPCore tile (HBI-0146) used with the RealView EB.
   32          * Reference: ARM DUI 0318F
   33          *
   34          * To run this machine with QEMU, specify the following:
   35          * qemu-system-arm -M realview-eb-mpcore -smp cpus=4
   36          */
   37         cpus {
   38                 #address-cells = <1>;
   39                 #size-cells = <0>;
   40                 enable-method = "arm,realview-smp";
   41 
   42                 MP11_0: cpu@0 {
   43                         device_type = "cpu";
   44                         compatible = "arm,arm11mpcore";
   45                         reg = <0>;
   46                         next-level-cache = <&L2>;
   47                 };
   48 
   49                 MP11_1: cpu@1 {
   50                         device_type = "cpu";
   51                         compatible = "arm,arm11mpcore";
   52                         reg = <1>;
   53                         next-level-cache = <&L2>;
   54                 };
   55 
   56                 MP11_2: cpu@2 {
   57                         device_type = "cpu";
   58                         compatible = "arm,arm11mpcore";
   59                         reg = <2>;
   60                         next-level-cache = <&L2>;
   61                 };
   62 
   63                 MP11_3: cpu@3 {
   64                         device_type = "cpu";
   65                         compatible = "arm,arm11mpcore";
   66                         reg = <3>;
   67                         next-level-cache = <&L2>;
   68                 };
   69         };
   70 };
   71 
   72 &pmu {
   73         interrupt-affinity = <&MP11_0>, <&MP11_1>, <&MP11_2>, <&MP11_3>;
   74 };

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