armada-385-turris-omnia.dts

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    1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
    2 /*
    3  * Device Tree file for the Turris Omnia
    4  *
    5  * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org>
    6  * Copyright (C) 2016 Tomas Hlavacek <tmshlvkc@gmail.com>
    7  *
    8  * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
    9  */
   10 
   11 /dts-v1/;
   12 
   13 #include <dt-bindings/gpio/gpio.h>
   14 #include <dt-bindings/input/input.h>
   15 #include <dt-bindings/leds/common.h>
   16 #include "armada-385.dtsi"
   17 
   18 / {
   19         model = "Turris Omnia";
   20         compatible = "cznic,turris-omnia", "marvell,armada385", "marvell,armada380";
   21 
   22         chosen {
   23                 stdout-path = &uart0;
   24         };
   25 
   26         memory {
   27                 device_type = "memory";
   28                 reg = <0x00000000 0x40000000>; /* 1024 MB */
   29         };
   30 
   31         soc {
   32                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
   33                           MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
   34                           MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
   35                           MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
   36                           MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
   37 
   38                 internal-regs {
   39 
   40                         /* USB part of the PCIe2/USB 2.0 port */
   41                         usb@58000 {
   42                                 status = "okay";
   43                         };
   44 
   45                         sata@a8000 {
   46                                 status = "okay";
   47                         };
   48 
   49                         sdhci@d8000 {
   50                                 pinctrl-names = "default";
   51                                 pinctrl-0 = <&sdhci_pins>;
   52                                 status = "okay";
   53 
   54                                 bus-width = <8>;
   55                                 no-1-8-v;
   56                                 non-removable;
   57                         };
   58 
   59                         usb3@f0000 {
   60                                 status = "okay";
   61                         };
   62 
   63                         usb3@f8000 {
   64                                 status = "okay";
   65                         };
   66                 };
   67 
   68                 pcie {
   69                         status = "okay";
   70 
   71                         pcie@1,0 {
   72                                 /* Port 0, Lane 0 */
   73                                 status = "okay";
   74                                 slot-power-limit-milliwatt = <10000>;
   75                         };
   76 
   77                         pcie@2,0 {
   78                                 /* Port 1, Lane 0 */
   79                                 status = "okay";
   80                                 slot-power-limit-milliwatt = <10000>;
   81                         };
   82 
   83                         pcie@3,0 {
   84                                 /* Port 2, Lane 0 */
   85                                 status = "okay";
   86                                 slot-power-limit-milliwatt = <10000>;
   87                         };
   88                 };
   89         };
   90 
   91         sfp: sfp {
   92                 compatible = "sff,sfp";
   93                 i2c-bus = <&sfp_i2c>;
   94                 tx-fault-gpios = <&pcawan 0 GPIO_ACTIVE_HIGH>;
   95                 tx-disable-gpios = <&pcawan 1 GPIO_ACTIVE_HIGH>;
   96                 rate-select0-gpios = <&pcawan 2 GPIO_ACTIVE_HIGH>;
   97                 los-gpios = <&pcawan 3 GPIO_ACTIVE_HIGH>;
   98                 mod-def0-gpios = <&pcawan 4 GPIO_ACTIVE_LOW>;
   99                 maximum-power-milliwatt = <3000>;
  100 
  101                 /*
  102                  * For now this has to be enabled at boot time by U-Boot when
  103                  * a SFP module is present. Read more in the comment in the
  104                  * eth2 node below.
  105                  */
  106                 status = "disabled";
  107         };
  108 };
  109 
  110 &bm {
  111         status = "okay";
  112 };
  113 
  114 &bm_bppi {
  115         status = "okay";
  116 };
  117 
  118 /* Connected to 88E6176 switch, port 6 */
  119 &eth0 {
  120         pinctrl-names = "default";
  121         pinctrl-0 = <&ge0_rgmii_pins>;
  122         status = "okay";
  123         phy-mode = "rgmii";
  124         buffer-manager = <&bm>;
  125         bm,pool-long = <0>;
  126         bm,pool-short = <3>;
  127 
  128         fixed-link {
  129                 speed = <1000>;
  130                 full-duplex;
  131         };
  132 };
  133 
  134 /* Connected to 88E6176 switch, port 5 */
  135 &eth1 {
  136         pinctrl-names = "default";
  137         pinctrl-0 = <&ge1_rgmii_pins>;
  138         status = "okay";
  139         phy-mode = "rgmii";
  140         buffer-manager = <&bm>;
  141         bm,pool-long = <1>;
  142         bm,pool-short = <3>;
  143 
  144         fixed-link {
  145                 speed = <1000>;
  146                 full-duplex;
  147         };
  148 };
  149 
  150 /* WAN port */
  151 &eth2 {
  152         /*
  153          * eth2 is connected via a multiplexor to both the SFP cage and to
  154          * ethernet-phy@1. The multiplexor switches the signal to SFP cage when
  155          * a SFP module is present, as determined by the mode-def0 GPIO.
  156          *
  157          * Until kernel supports this configuration properly, in case SFP module
  158          * is present, U-Boot has to enable the sfp node above, remove phy
  159          * handle and add managed = "in-band-status" property.
  160          */
  161         status = "okay";
  162         phy-mode = "sgmii";
  163         phy-handle = <&phy1>;
  164         phys = <&comphy5 2>;
  165         sfp = <&sfp>;
  166         buffer-manager = <&bm>;
  167         bm,pool-long = <2>;
  168         bm,pool-short = <3>;
  169 };
  170 
  171 &i2c0 {
  172         pinctrl-names = "default";
  173         pinctrl-0 = <&i2c0_pins>;
  174         status = "okay";
  175 
  176         i2cmux@70 {
  177                 compatible = "nxp,pca9547";
  178                 #address-cells = <1>;
  179                 #size-cells = <0>;
  180                 reg = <0x70>;
  181 
  182                 i2c@0 {
  183                         #address-cells = <1>;
  184                         #size-cells = <0>;
  185                         reg = <0>;
  186 
  187                         /* STM32F0 command interface at address 0x2a */
  188 
  189                         led-controller@2b {
  190                                 compatible = "cznic,turris-omnia-leds";
  191                                 reg = <0x2b>;
  192                                 #address-cells = <1>;
  193                                 #size-cells = <0>;
  194                                 status = "okay";
  195 
  196                                 /*
  197                                  * LEDs are controlled by MCU (STM32F0) at
  198                                  * address 0x2b.
  199                                  *
  200                                  * LED functions are not stable yet:
  201                                  * - there are 3 LEDs connected via MCU to PCIe
  202                                  *   ports. One of these ports supports mSATA.
  203                                  *   There is no mSATA nor PCIe function.
  204                                  *   For now we use LED_FUNCTION_WLAN, since
  205                                  *   in most cases users have wifi cards in
  206                                  *   these slots
  207                                  * - there are 2 LEDs dedicated for user: A and
  208                                  *   B. Again there is no such function defined.
  209                                  *   For now we use LED_FUNCTION_INDICATOR
  210                                  */
  211 
  212                                 multi-led@0 {
  213                                         reg = <0x0>;
  214                                         color = <LED_COLOR_ID_RGB>;
  215                                         function = LED_FUNCTION_INDICATOR;
  216                                         function-enumerator = <2>;
  217                                 };
  218 
  219                                 multi-led@1 {
  220                                         reg = <0x1>;
  221                                         color = <LED_COLOR_ID_RGB>;
  222                                         function = LED_FUNCTION_INDICATOR;
  223                                         function-enumerator = <1>;
  224                                 };
  225 
  226                                 multi-led@2 {
  227                                         reg = <0x2>;
  228                                         color = <LED_COLOR_ID_RGB>;
  229                                         function = LED_FUNCTION_WLAN;
  230                                         function-enumerator = <3>;
  231                                 };
  232 
  233                                 multi-led@3 {
  234                                         reg = <0x3>;
  235                                         color = <LED_COLOR_ID_RGB>;
  236                                         function = LED_FUNCTION_WLAN;
  237                                         function-enumerator = <2>;
  238                                 };
  239 
  240                                 multi-led@4 {
  241                                         reg = <0x4>;
  242                                         color = <LED_COLOR_ID_RGB>;
  243                                         function = LED_FUNCTION_WLAN;
  244                                         function-enumerator = <1>;
  245                                 };
  246 
  247                                 multi-led@5 {
  248                                         reg = <0x5>;
  249                                         color = <LED_COLOR_ID_RGB>;
  250                                         function = LED_FUNCTION_WAN;
  251                                 };
  252 
  253                                 multi-led@6 {
  254                                         reg = <0x6>;
  255                                         color = <LED_COLOR_ID_RGB>;
  256                                         function = LED_FUNCTION_LAN;
  257                                         function-enumerator = <4>;
  258                                 };
  259 
  260                                 multi-led@7 {
  261                                         reg = <0x7>;
  262                                         color = <LED_COLOR_ID_RGB>;
  263                                         function = LED_FUNCTION_LAN;
  264                                         function-enumerator = <3>;
  265                                 };
  266 
  267                                 multi-led@8 {
  268                                         reg = <0x8>;
  269                                         color = <LED_COLOR_ID_RGB>;
  270                                         function = LED_FUNCTION_LAN;
  271                                         function-enumerator = <2>;
  272                                 };
  273 
  274                                 multi-led@9 {
  275                                         reg = <0x9>;
  276                                         color = <LED_COLOR_ID_RGB>;
  277                                         function = LED_FUNCTION_LAN;
  278                                         function-enumerator = <1>;
  279                                 };
  280 
  281                                 multi-led@a {
  282                                         reg = <0xa>;
  283                                         color = <LED_COLOR_ID_RGB>;
  284                                         function = LED_FUNCTION_LAN;
  285                                         function-enumerator = <0>;
  286                                 };
  287 
  288                                 multi-led@b {
  289                                         reg = <0xb>;
  290                                         color = <LED_COLOR_ID_RGB>;
  291                                         function = LED_FUNCTION_POWER;
  292                                 };
  293                         };
  294 
  295                         eeprom@54 {
  296                                 compatible = "atmel,24c64";
  297                                 reg = <0x54>;
  298 
  299                                 /* The EEPROM contains data for bootloader.
  300                                  * Contents:
  301                                  *      struct omnia_eeprom {
  302                                  *              u32 magic; (=0x0341a034 in LE)
  303                                  *              u32 ramsize; (in GiB)
  304                                  *              char regdomain[4];
  305                                  *              u32 crc32;
  306                                  *      };
  307                                  */
  308                         };
  309                 };
  310 
  311                 i2c@1 {
  312                         #address-cells = <1>;
  313                         #size-cells = <0>;
  314                         reg = <1>;
  315 
  316                         /* routed to PCIe0/mSATA connector (CN7A) */
  317                 };
  318 
  319                 i2c@2 {
  320                         #address-cells = <1>;
  321                         #size-cells = <0>;
  322                         reg = <2>;
  323 
  324                         /* routed to PCIe1/USB2 connector (CN61A) */
  325                 };
  326 
  327                 i2c@3 {
  328                         #address-cells = <1>;
  329                         #size-cells = <0>;
  330                         reg = <3>;
  331 
  332                         /* routed to PCIe2 connector (CN62A) */
  333                 };
  334 
  335                 sfp_i2c: i2c@4 {
  336                         #address-cells = <1>;
  337                         #size-cells = <0>;
  338                         reg = <4>;
  339 
  340                         /* routed to SFP+ */
  341                 };
  342 
  343                 i2c@5 {
  344                         #address-cells = <1>;
  345                         #size-cells = <0>;
  346                         reg = <5>;
  347 
  348                         /* ATSHA204A-MAHDA-T crypto module */
  349                         crypto@64 {
  350                                 compatible = "atmel,atsha204a";
  351                                 reg = <0x64>;
  352                         };
  353                 };
  354 
  355                 i2c@6 {
  356                         #address-cells = <1>;
  357                         #size-cells = <0>;
  358                         reg = <6>;
  359 
  360                         /* exposed on pin header */
  361                 };
  362 
  363                 i2c@7 {
  364                         #address-cells = <1>;
  365                         #size-cells = <0>;
  366                         reg = <7>;
  367 
  368                         pcawan: gpio@71 {
  369                                 /*
  370                                  * GPIO expander for SFP+ signals and
  371                                  * and phy irq
  372                                  */
  373                                 compatible = "nxp,pca9538";
  374                                 reg = <0x71>;
  375 
  376                                 pinctrl-names = "default";
  377                                 pinctrl-0 = <&pcawan_pins>;
  378 
  379                                 interrupt-parent = <&gpio1>;
  380                                 interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
  381 
  382                                 gpio-controller;
  383                                 #gpio-cells = <2>;
  384                         };
  385                 };
  386         };
  387 };
  388 
  389 &mdio {
  390         pinctrl-names = "default";
  391         pinctrl-0 = <&mdio_pins>;
  392         status = "okay";
  393 
  394         phy1: ethernet-phy@1 {
  395                 compatible = "ethernet-phy-ieee802.3-c22";
  396                 reg = <1>;
  397                 marvell,reg-init = <3 18 0 0x4985>,
  398                                    <3 16 0xfff0 0x0001>;
  399 
  400                 /* irq is connected to &pcawan pin 7 */
  401         };
  402 
  403         /* Switch MV88E6176 at address 0x10 */
  404         switch@10 {
  405                 pinctrl-names = "default";
  406                 pinctrl-0 = <&swint_pins>;
  407                 compatible = "marvell,mv88e6085";
  408                 #address-cells = <1>;
  409                 #size-cells = <0>;
  410 
  411                 dsa,member = <0 0>;
  412                 reg = <0x10>;
  413 
  414                 interrupt-parent = <&gpio1>;
  415                 interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
  416 
  417                 ports {
  418                         #address-cells = <1>;
  419                         #size-cells = <0>;
  420 
  421                         ports@0 {
  422                                 reg = <0>;
  423                                 label = "lan0";
  424                         };
  425 
  426                         ports@1 {
  427                                 reg = <1>;
  428                                 label = "lan1";
  429                         };
  430 
  431                         ports@2 {
  432                                 reg = <2>;
  433                                 label = "lan2";
  434                         };
  435 
  436                         ports@3 {
  437                                 reg = <3>;
  438                                 label = "lan3";
  439                         };
  440 
  441                         ports@4 {
  442                                 reg = <4>;
  443                                 label = "lan4";
  444                         };
  445 
  446                         ports@5 {
  447                                 reg = <5>;
  448                                 label = "cpu";
  449                                 ethernet = <&eth1>;
  450                                 phy-mode = "rgmii-id";
  451 
  452                                 fixed-link {
  453                                         speed = <1000>;
  454                                         full-duplex;
  455                                 };
  456                         };
  457 
  458                         /* port 6 is connected to eth0 */
  459                 };
  460         };
  461 };
  462 
  463 &pinctrl {
  464         pcawan_pins: pcawan-pins {
  465                 marvell,pins = "mpp46";
  466                 marvell,function = "gpio";
  467         };
  468 
  469         swint_pins: swint-pins {
  470                 marvell,pins = "mpp45";
  471                 marvell,function = "gpio";
  472         };
  473 
  474         spi0cs0_pins: spi0cs0-pins {
  475                 marvell,pins = "mpp25";
  476                 marvell,function = "spi0";
  477         };
  478 
  479         spi0cs1_pins: spi0cs1-pins {
  480                 marvell,pins = "mpp26";
  481                 marvell,function = "spi0";
  482         };
  483 };
  484 
  485 &spi0 {
  486         pinctrl-names = "default";
  487         pinctrl-0 = <&spi0_pins &spi0cs0_pins>;
  488         status = "okay";
  489 
  490         flash@0 {
  491                 compatible = "spansion,s25fl164k", "jedec,spi-nor";
  492                 #address-cells = <1>;
  493                 #size-cells = <1>;
  494                 reg = <0>;
  495                 spi-max-frequency = <40000000>;
  496 
  497                 partitions {
  498                         compatible = "fixed-partitions";
  499                         #address-cells = <1>;
  500                         #size-cells = <1>;
  501 
  502                         partition@0 {
  503                                 reg = <0x0 0x00100000>;
  504                                 label = "U-Boot";
  505                         };
  506 
  507                         partition@100000 {
  508                                 reg = <0x00100000 0x00700000>;
  509                                 label = "Rescue system";
  510                         };
  511                 };
  512         };
  513 
  514         /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
  515 };
  516 
  517 &uart0 {
  518         /* Pin header CN10 */
  519         pinctrl-names = "default";
  520         pinctrl-0 = <&uart0_pins>;
  521         status = "okay";
  522 };
  523 
  524 &uart1 {
  525         /* Pin header CN11 */
  526         pinctrl-names = "default";
  527         pinctrl-0 = <&uart1_pins>;
  528         status = "okay";
  529 };
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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm/armada-385-turris-omnia.dts

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sys/contrib/device-tree/src/arm/armada-385-turris-omnia.dts
