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sys/contrib/device-tree/src/arm/aspeed-bmc-bytedance-g220a.dts
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1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright (C) 2020 Bytedance. 3 /dts-v1/; 4 5 #include "aspeed-g5.dtsi" 6 #include <dt-bindings/gpio/aspeed-gpio.h> 7 #include <dt-bindings/i2c/i2c.h> 8 #include <dt-bindings/leds/leds-pca955x.h> 9 10 / { 11 model = "Bytedance G220A BMC"; 12 compatible = "bytedance,g220a-bmc", "aspeed,ast2500"; 13 14 aliases { 15 serial4 = &uart5; 16 i2c14 = &channel_3_0; 17 i2c15 = &channel_3_1; 18 i2c16 = &channel_3_2; 19 i2c17 = &channel_3_3; 20 i2c18 = &channel_6_0; 21 i2c19 = &channel_6_1; 22 i2c20 = &channel_6_2; 23 i2c21 = &channel_6_3; 24 i2c22 = &channel_6_4; 25 i2c23 = &channel_6_5; 26 i2c24 = &channel_6_6; 27 i2c25 = &channel_6_7; 28 i2c26 = &channel_6_8; 29 i2c27 = &channel_6_9; 30 i2c28 = &channel_6_10; 31 i2c29 = &channel_6_11; 32 i2c30 = &channel_6_12; 33 i2c31 = &channel_6_13; 34 i2c32 = &channel_6_14; 35 i2c33 = &channel_6_15; 36 i2c34 = &channel_6_16; 37 i2c35 = &channel_6_17; 38 i2c36 = &channel_6_18; 39 i2c37 = &channel_6_19; 40 i2c38 = &channel_6_20; 41 i2c39 = &channel_6_21; 42 i2c40 = &channel_6_22; 43 i2c41 = &channel_6_23; 44 i2c42 = &channel_6_24; 45 i2c43 = &channel_6_25; 46 i2c44 = &channel_10_0; 47 i2c45 = &channel_10_1; 48 i2c46 = &channel_10_2; 49 i2c47 = &channel_10_3; 50 i2c48 = &channel_10_4; 51 i2c49 = &channel_10_5; 52 i2c50 = &channel_10_6; 53 i2c51 = &channel_10_7; 54 }; 55 56 chosen { 57 stdout-path = &uart5; 58 bootargs = "console=ttyS4,115200 earlycon"; 59 }; 60 61 memory@80000000 { 62 reg = <0x80000000 0x40000000>; 63 }; 64 65 reserved-memory { 66 #address-cells = <1>; 67 #size-cells = <1>; 68 ranges; 69 70 vga_memory: framebuffer@bc000000 { 71 no-map; 72 reg = <0xbc000000 0x04000000>; /* 64M */ 73 }; 74 75 video_engine_memory: jpegbuffer { 76 size = <0x02000000>; /* 32M */ 77 alignment = <0x01000000>; 78 compatible = "shared-dma-pool"; 79 reusable; 80 }; 81 }; 82 83 iio-hwmon { 84 compatible = "iio-hwmon"; 85 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 86 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, 87 <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, 88 <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>; 89 }; 90 91 leds { 92 compatible = "gpio-leds"; 93 bmc_alive { 94 label = "bmc_alive"; 95 gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>; 96 linux,default-trigger = "timer"; 97 led-pattern = <1000 1000>; 98 }; 99 }; 100 101 gpio-keys { 102 compatible = "gpio-keys"; 103 event-burn-in-signal { 104 label = "burn-in"; 105 gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>; 106 linux,code = <ASPEED_GPIO(R, 5)>; 107 }; 108 }; 109 110 gpio-keys-polled { 111 compatible = "gpio-keys-polled"; 112 poll-interval = <1000>; 113 114 event-rear-riser1-presence { 115 label = "rear-riser1-presence"; 116 gpios = <&pca0 1 GPIO_ACTIVE_LOW>; 117 linux,code = <1>; 118 }; 119 120 event-alrt-pvddq-cpu0 { 121 label = "alrt-pvddq-cpu0"; 122 gpios = <&pca0 8 GPIO_ACTIVE_LOW>; 123 linux,code = <2>; 124 }; 125 126 event-rear-riser0-presence { 127 label = "rear-riser0-presence"; 128 gpios = <&pca0 9 GPIO_ACTIVE_LOW>; 129 linux,code = <3>; 130 }; 131 132 event-fault-pvddq-cpu0 { 133 label = "fault-pvddq-cpu0"; 134 gpios = <&pca0 10 GPIO_ACTIVE_LOW>; 135 linux,code = <4>; 136 }; 137 138 event-alrt-pvddq-cpu1 { 139 label = "alrt-pvddq-cpu1"; 140 gpios = <&pca0 11 GPIO_ACTIVE_LOW>; 141 linux,code = <5>; 142 }; 143 144 event-fault-pvddq-cpu1 { 145 label = "alrt-pvddq-cpu1"; 146 gpios = <&pca0 12 GPIO_ACTIVE_LOW>; 147 linux,code = <6>; 148 }; 149 150 event-fault-pvccin-cpu1 { 151 label = "fault-pvccin-cpuq"; 152 gpios = <&pca0 13 GPIO_ACTIVE_LOW>; 153 linux,code = <7>; 154 }; 155 156 event-bmc-rom0-wp { 157 label = "bmc-rom0-wp"; 158 gpios = <&pca1 0 GPIO_ACTIVE_LOW>; 159 linux,code = <8>; 160 }; 161 162 event-bmc-rom1-wp { 163 label = "bmc-rom1-wp"; 164 gpios = <&pca1 1 GPIO_ACTIVE_LOW>; 165 linux,code = <9>; 166 }; 167 168 event-fan0-presence { 169 label = "fan0-presence"; 170 gpios = <&pca1 2 GPIO_ACTIVE_LOW>; 171 linux,code = <10>; 172 }; 173 174 event-fan1-presence { 175 label = "fan1-presence"; 176 gpios = <&pca1 3 GPIO_ACTIVE_LOW>; 177 linux,code = <11>; 178 }; 179 180 event-fan2-presence { 181 label = "fan2-presence"; 182 gpios = <&pca1 4 GPIO_ACTIVE_LOW>; 183 linux,code = <12>; 184 }; 185 186 event-fan3-presence { 187 label = "fan3-presence"; 188 gpios = <&pca1 5 GPIO_ACTIVE_LOW>; 189 linux,code = <13>; 190 }; 191 192 event-fan4-presence { 193 label = "fan4-presence"; 194 gpios = <&pca1 6 GPIO_ACTIVE_LOW>; 195 linux,code = <14>; 196 }; 197 198 event-fan5-presence { 199 label = "fan5-presence"; 200 gpios = <&pca1 7 GPIO_ACTIVE_LOW>; 201 linux,code = <15>; 202 }; 203 204 event-front-bp1-presence { 205 label = "front-bp1-presence"; 206 gpios = <&pca1 8 GPIO_ACTIVE_LOW>; 207 linux,code = <16>; 208 }; 209 210 event-rear-bp-presence { 211 label = "rear-bp-presence"; 212 gpios = <&pca1 9 GPIO_ACTIVE_LOW>; 213 linux,code = <17>; 214 }; 215 216 event-fault-pvccin-cpu0 { 217 label = "fault-pvccin-cpu0"; 218 gpios = <&pca1 10 GPIO_ACTIVE_LOW>; 219 linux,code = <18>; 220 }; 221 222 event-alrt-p1v05-pvcc { 223 label = "alrt-p1v05-pvcc1"; 224 gpios = <&pca1 11 GPIO_ACTIVE_LOW>; 225 linux,code = <19>; 226 }; 227 228 event-fault-p1v05-pvccio { 229 label = "alrt-p1v05-pvcc1"; 230 gpios = <&pca1 12 GPIO_ACTIVE_LOW>; 231 linux,code = <20>; 232 }; 233 234 event-alrt-p1v8-pvccio { 235 label = "alrt-p1v8-pvccio"; 236 gpios = <&pca1 13 GPIO_ACTIVE_LOW>; 237 linux,code = <21>; 238 }; 239 240 event-fault-p1v8-pvccio { 241 label = "fault-p1v8-pvccio"; 242 gpios = <&pca1 14 GPIO_ACTIVE_LOW>; 243 linux,code = <22>; 244 }; 245 246 event-front-bp0-presence { 247 label = "front-bp0-presence"; 248 gpios = <&pca1 15 GPIO_ACTIVE_LOW>; 249 linux,code = <23>; 250 }; 251 }; 252 }; 253 254 &fmc { 255 status = "okay"; 256 flash@0 { 257 status = "okay"; 258 label = "bmc"; 259 m25p,fast-read; 260 spi-max-frequency = <50000000>; 261 #include "openbmc-flash-layout-64.dtsi" 262 }; 263 flash@1 { 264 status = "okay"; 265 label = "alt-bmc"; 266 m25p,fast-read; 267 spi-max-frequency = <50000000>; 268 #include "openbmc-flash-layout-64-alt.dtsi" 269 }; 270 }; 271 272 &spi1 { 273 status = "okay"; 274 pinctrl-names = "default"; 275 pinctrl-0 = <&pinctrl_spi1_default>; 276 flash@0 { 277 status = "okay"; 278 m25p,fast-read; 279 label = "bios"; 280 spi-max-frequency = <100000000>; 281 }; 282 }; 283 284 &adc { 285 status = "okay"; 286 }; 287 288 &wdt2 { 289 status = "okay"; 290 aspeed,alt-boot; 291 }; 292 293 &gpio { 294 status = "okay"; 295 gpio-line-names = 296 /*A0-A7*/ "SMRST_OCP_N","MAC2_LINK","BMC_CPLD_SMB_RST_R_N","BMC_CPLD_GPIO0", 297 "","","","", 298 /*B0-B7*/ "BMC_INIT_R_OK","FM_BOARD_REV_ID2","FM_PROJECT_ID7","FAULT_P12V_STBY_N", 299 "","CPU0_PROCHOT_LVT3_N","","BIOS_LOAD_DEFAULT_R_N", 300 /*C0-C7*/ "","","","","","","","", 301 /*D0-D7*/ "","","","","","","","", 302 /*E0-E7*/ "FM_PROJECT_ID0","FM_PROJECT_ID1","FM_PROJECT_ID2","FM_PROJECT_ID3", 303 "FM_PROJECT_ID4","FM_PROJECT_ID5","","", 304 /*F0-F7*/ "PSU0_PRSNT_N","PSU1_PRSNT_N","","FAULT_P12V_NVME_N", 305 "BIOS_DEBUG_MODE_R_N","DISABLE_CPU_DDR_R_SPD","COOLING_STRATEGY", 306 "PCH_GLB_RST_N", 307 /*G0-G7*/ "P12V_PMBUS_ALERT_N","CPLD_ALERT_N","BMC_RELOAD_N", 308 "P12V_PVDDQ_PMBUS_ALERT_N","BMC_JTAG_TCK_MUX_R_SEL","","NMI_OUT", 309 "NMI_BUTTON", 310 /*H0-H7*/ "BMC_CPLD_JTAG_TDI","BMC_CPLD_JTAG_TDO","BMC_CPLD_JTAG_TCK", 311 "BMC_CPLD_JTAG_TMS","FM_PROJECT_ID6","FM_BOARD_REV_ID0", 312 "PCA9546_U70_RST_N","IRQ_SML0_ALERT_N", 313 /*I0-I7*/ "FAULT_FRONT_RISER_P12V_N","FAULT_OCP_P12V_N","FM_BMC_PCH_SCI_R_N", 314 "","","","","", 315 /*J0-J7*/ "FM_CPU0_SKTOCC_N","FM_CPU1_SKTOCC_N","FM_CPU1_DISABLE_COD_N", 316 "","","","","", 317 /*K0-K7*/ "","","","","","","","", 318 /*L0-L7*/ "P12V_FAULT_N","PWRGD_P12V_PCIE_RISER","","LEAKAGE_DETECT_INPUT_N", 319 "","IRQ_SML1_PMBUS_ALERT_N","","", 320 /*M0-M7*/ "","","","","","","","", 321 /*N0-N7*/ "","","","","","","","", 322 /*O0-O7*/ "","","","","","","","", 323 /*P0-P7*/ "","","","","","","","", 324 /*Q0-Q7*/ "","","","","","","FM_PCH_THERMTRIP_N","CHASSIS_INTRUSION", 325 /*R0-R7*/ "","PVCCIN_CPU1_SMBALERT_N","BMC_PREQ_R_N","FAULT_P12V_PCIE_RISER_N", 326 "ALT_P12V_PCIE_RISER_N","BURN_BOARD_N","PVCCIN_CPU0_SMBALERT_N","", 327 /*S0-S7*/ "BMC_PRDY_N","SIO_POWER_GOOD","FM_BMC_PWR_DEBUG_R_N", 328 "FM_BMC_XDP_DEBUG_EN","","STRAP_BMC_BATTERY_GPIOS5","","", 329 /*T0-T7*/ "","","","","","","","", 330 /*U0-U7*/ "","","","","","","","", 331 /*V0-V7*/ "","","","","","","","", 332 /*W0-W7*/ "","","","","","","","", 333 /*X0-X7*/ "","","","","","","","", 334 /*Y0-Y7*/ "","PWRGD_PSU0_PWROK","CPU1_PROCHOT_LVT3_N","IRQ_BMC_PCH_SMI_LPC_N", 335 "","","","", 336 /*Z0-Z7*/ "XDP_PRSNT_N","BMC_XDP_SYS_PWROK","BMC_XDP_JTAG_SEL", 337 "PCH_BMC_SMI_ACTIVE_R_N","","","","", 338 /*AA0-AA7*/ "PWRGD_P12V_STBY_OCP","PS_PWROK","RST_PLTRST_BMC_R_N","HDA_SDO_R", 339 "FM_SLPS4_R_N","PWRGD_PSU1_PWROK","POWER_BUTTON","POWER_OUT", 340 /*AB0-AB7*/ "","RESET_OUT","SPI_BIOS_MODE_SELECT","POST_COMPLETE","","","","", 341 /*AC0-AC7*/ "","","","","","","","CPLD_PLTRST_B_N"; 342 }; 343 344 &kcs3 { 345 aspeed,lpc-io-reg = <0xCA2>; 346 status = "okay"; 347 }; 348 349 &kcs4 { 350 aspeed,lpc-io-reg = <0xCA4>; 351 status = "okay"; 352 }; 353 354 &lpc_snoop { 355 snoop-ports = <0x80>; 356 status = "okay"; 357 }; 358 359 &uart1 { 360 status = "okay"; 361 pinctrl-names = "default"; 362 pinctrl-0 = <&pinctrl_txd1_default 363 &pinctrl_rxd1_default 364 &pinctrl_nrts1_default 365 &pinctrl_ndtr1_default 366 &pinctrl_ndsr1_default 367 &pinctrl_ncts1_default 368 &pinctrl_ndcd1_default 369 &pinctrl_nri1_default>; 370 }; 371 372 &uart2 { 373 status = "okay"; 374 pinctrl-names = "default"; 375 pinctrl-0 = <&pinctrl_txd2_default 376 &pinctrl_rxd2_default 377 &pinctrl_nrts2_default 378 &pinctrl_ndtr2_default 379 &pinctrl_ndsr2_default 380 &pinctrl_ncts2_default 381 &pinctrl_ndcd2_default 382 &pinctrl_nri2_default>; 383 }; 384 385 &uart3 { 386 status = "okay"; 387 }; 388 389 &uart4 { 390 status = "okay"; 391 }; 392 393 &uart5 { 394 status = "okay"; 395 }; 396 397 &mac0 { 398 status = "okay"; 399 pinctrl-names = "default"; 400 pinctrl-0 = <&pinctrl_rmii1_default>; 401 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 402 <&syscon ASPEED_CLK_MAC1RCLK>; 403 clock-names = "MACCLK", "RCLK"; 404 use-ncsi; 405 }; 406 407 &mac1 { 408 status = "okay"; 409 pinctrl-names = "default"; 410 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 411 }; 412 413 &i2c0 { 414 status = "okay"; 415 }; 416 417 &i2c1 { 418 status = "okay"; 419 }; 420 421 &i2c2 { 422 status = "okay"; 423 }; 424 425 &i2c3 { 426 status = "okay"; 427 i2c-switch@70 { 428 compatible = "nxp,pca9546"; 429 reg = <0x70>; 430 #address-cells = <1>; 431 #size-cells = <0>; 432 433 channel_3_0: i2c@0 { 434 #address-cells = <1>; 435 #size-cells = <0>; 436 reg = <0>; 437 }; 438 439 channel_3_1: i2c@1 { 440 #address-cells = <1>; 441 #size-cells = <0>; 442 reg = <1>; 443 }; 444 445 channel_3_2: i2c@2 { 446 #address-cells = <1>; 447 #size-cells = <0>; 448 reg = <2>; 449 }; 450 451 channel_3_3: i2c@3 { 452 #address-cells = <1>; 453 #size-cells = <0>; 454 reg = <3>; 455 }; 456 }; 457 }; 458 459 &i2c4 { 460 status = "okay"; 461 ipmb0@10 { 462 compatible = "ipmb-dev"; 463 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 464 i2c-protocol; 465 }; 466 }; 467 468 &i2c5 { 469 status = "okay"; 470 }; 471 472 &i2c6 { 473 status = "okay"; 474 i2c-switch@72 { 475 compatible = "nxp,pca9548"; 476 reg = <0x72>; 477 #address-cells = <1>; 478 #size-cells = <0>; 479 channel_6_0: i2c@0 { 480 #address-cells = <1>; 481 #size-cells = <0>; 482 reg = <0>; 483 }; 484 485 channel_6_1: i2c@1 { 486 #address-cells = <1>; 487 #size-cells = <0>; 488 reg = <1>; 489 }; 490 491 channel_6_2: i2c@2 { 492 #address-cells = <1>; 493 #size-cells = <0>; 494 reg = <2>; 495 }; 496 497 channel_6_3: i2c@3 { 498 #address-cells = <1>; 499 #size-cells = <0>; 500 reg = <3>; 501 }; 502 channel_6_4: i2c@4 { 503 #address-cells = <1>; 504 #size-cells = <0>; 505 reg = <4>; 506 }; 507 508 channel_6_5: i2c@5 { 509 #address-cells = <1>; 510 #size-cells = <0>; 511 reg = <5>; 512 }; 513 514 channel_6_6: i2c@6 { 515 #address-cells = <1>; 516 #size-cells = <0>; 517 reg = <6>; 518 }; 519 520 channel_6_7: i2c@7 { 521 #address-cells = <1>; 522 #size-cells = <0>; 523 reg = <7>; 524 }; 525 }; 526 527 i2c-switch@70 { 528 compatible = "nxp,pca9546"; 529 reg = <0x70>; 530 #address-cells = <1>; 531 #size-cells = <0>; 532 channel_6_8: i2c@0 { 533 #address-cells = <1>; 534 #size-cells = <0>; 535 reg = <0>; 536 i2c-switch@71 { 537 compatible = "nxp,pca9546"; 538 reg = <0x71>; 539 #address-cells = <1>; 540 #size-cells = <0>; 541 channel_6_12: i2c@0 { 542 #address-cells = <1>; 543 #size-cells = <0>; 544 reg = <0>; 545 546 }; 547 548 channel_6_13: i2c@1 { 549 #address-cells = <1>; 550 #size-cells = <0>; 551 reg = <1>; 552 }; 553 554 channel_6_14: i2c@2 { 555 #address-cells = <1>; 556 #size-cells = <0>; 557 reg = <2>; 558 }; 559 560 channel_6_15: i2c@3 { 561 #address-cells = <1>; 562 #size-cells = <0>; 563 reg = <3>; 564 }; 565 }; 566 }; 567 568 channel_6_9: i2c@1 { 569 #address-cells = <1>; 570 #size-cells = <0>; 571 reg = <1>; 572 i2c-switch@71 { 573 compatible = "nxp,pca9546"; 574 reg = <0x71>; 575 #address-cells = <1>; 576 #size-cells = <0>; 577 channel_6_16: i2c@0 { 578 #address-cells = <1>; 579 #size-cells = <0>; 580 reg = <0>; 581 582 }; 583 584 channel_6_17: i2c@1 { 585 #address-cells = <1>; 586 #size-cells = <0>; 587 reg = <1>; 588 }; 589 590 channel_6_18: i2c@2 { 591 #address-cells = <1>; 592 #size-cells = <0>; 593 reg = <2>; 594 }; 595 596 channel_6_19: i2c@3 { 597 #address-cells = <1>; 598 #size-cells = <0>; 599 reg = <3>; 600 }; 601 }; 602 }; 603 604 channel_6_10: i2c@2 { 605 #address-cells = <1>; 606 #size-cells = <0>; 607 reg = <2>; 608 i2c-switch@71 { 609 compatible = "nxp,pca9546"; 610 reg = <0x71>; 611 #address-cells = <1>; 612 #size-cells = <0>; 613 channel_6_20: i2c@0 { 614 #address-cells = <1>; 615 #size-cells = <0>; 616 reg = <0>; 617 }; 618 619 channel_6_21: i2c@1 { 620 #address-cells = <1>; 621 #size-cells = <0>; 622 reg = <1>; 623 }; 624 625 channel_6_22: i2c@2 { 626 #address-cells = <1>; 627 #size-cells = <0>; 628 reg = <2>; 629 }; 630 631 channel_6_23: i2c@3 { 632 #address-cells = <1>; 633 #size-cells = <0>; 634 reg = <3>; 635 }; 636 }; 637 }; 638 639 channel_6_11: i2c@3 { 640 #address-cells = <1>; 641 #size-cells = <0>; 642 reg = <3>; 643 i2c-switch@71 { 644 compatible = "nxp,pca9546"; 645 reg = <0x71>; 646 #address-cells = <1>; 647 #size-cells = <0>; 648 channel_6_24: i2c@0 { 649 #address-cells = <1>; 650 #size-cells = <0>; 651 reg = <0>; 652 }; 653 654 channel_6_25: i2c@1 { 655 #address-cells = <1>; 656 #size-cells = <0>; 657 reg = <1>; 658 }; 659 }; 660 }; 661 }; 662 }; 663 664 &i2c7 { 665 status = "okay"; 666 }; 667 668 &i2c8 { 669 status = "okay"; 670 pca0:pca9555@24 { 671 compatible = "nxp,pca9555"; 672 reg = <0x24>; 673 #address-cells = <1>; 674 #size-cells = <0>; 675 676 gpio-controller; 677 #gpio-cells = <2>; 678 gpio@1 { 679 reg = <1>; 680 type = <PCA955X_TYPE_GPIO>; 681 }; 682 683 gpio@8 { 684 reg = <8>; 685 type = <PCA955X_TYPE_GPIO>; 686 }; 687 688 gpio@9 { 689 reg = <9>; 690 type = <PCA955X_TYPE_GPIO>; 691 }; 692 693 gpio@10 { 694 reg = <10>; 695 type = <PCA955X_TYPE_GPIO>; 696 }; 697 698 gpio@11 { 699 reg = <11>; 700 type = <PCA955X_TYPE_GPIO>; 701 }; 702 703 gpio@12 { 704 reg = <12>; 705 type = <PCA955X_TYPE_GPIO>; 706 }; 707 708 gpio@13 { 709 reg = <13>; 710 type = <PCA955X_TYPE_GPIO>; 711 }; 712 }; 713 714 pca1:pca9555@25 { 715 compatible = "nxp,pca9555"; 716 reg = <0x25>; 717 718 #address-cells = <1>; 719 #size-cells = <0>; 720 721 gpio-controller; 722 #gpio-cells = <2>; 723 724 gpio@0 { 725 reg = <0>; 726 type = <PCA955X_TYPE_GPIO>; 727 }; 728 729 gpio@1 { 730 reg = <1>; 731 type = <PCA955X_TYPE_GPIO>; 732 }; 733 734 gpio@2 { 735 reg = <2>; 736 type = <PCA955X_TYPE_GPIO>; 737 }; 738 739 gpio@3 { 740 reg = <3>; 741 type = <PCA955X_TYPE_GPIO>; 742 }; 743 744 gpio@4 { 745 reg = <4>; 746 type = <PCA955X_TYPE_GPIO>; 747 }; 748 749 gpio@5 { 750 reg = <5>; 751 type = <PCA955X_TYPE_GPIO>; 752 }; 753 754 gpio@6 { 755 reg = <6>; 756 type = <PCA955X_TYPE_GPIO>; 757 }; 758 759 gpio@7 { 760 reg = <7>; 761 type = <PCA955X_TYPE_GPIO>; 762 }; 763 gpio@8 { 764 reg = <8>; 765 type = <PCA955X_TYPE_GPIO>; 766 }; 767 768 gpio@9 { 769 reg = <9>; 770 type = <PCA955X_TYPE_GPIO>; 771 }; 772 773 gpio@10 { 774 reg = <10>; 775 type = <PCA955X_TYPE_GPIO>; 776 }; 777 778 gpio@11 { 779 reg = <11>; 780 type = <PCA955X_TYPE_GPIO>; 781 }; 782 783 gpio@12 { 784 reg = <12>; 785 type = <PCA955X_TYPE_GPIO>; 786 }; 787 788 gpio@13 { 789 reg = <13>; 790 type = <PCA955X_TYPE_GPIO>; 791 }; 792 793 gpio@14 { 794 reg = <14>; 795 type = <PCA955X_TYPE_GPIO>; 796 }; 797 798 gpio@15 { 799 reg = <15>; 800 type = <PCA955X_TYPE_GPIO>; 801 }; 802 }; 803 }; 804 805 &i2c9 { 806 status = "okay"; 807 }; 808 809 &i2c10 { 810 status = "okay"; 811 i2c-switch@70 { 812 compatible = "nxp,pca9546"; 813 reg = <0x70>; 814 #address-cells = <1>; 815 #size-cells = <0>; 816 channel_10_0: i2c@0 { 817 #address-cells = <1>; 818 #size-cells = <0>; 819 reg = <0>; 820 }; 821 822 channel_10_1: i2c@1 { 823 #address-cells = <1>; 824 #size-cells = <0>; 825 reg = <1>; 826 }; 827 828 channel_10_2: i2c@2 { 829 #address-cells = <1>; 830 #size-cells = <0>; 831 reg = <2>; 832 }; 833 834 channel_10_3: i2c@3 { 835 #address-cells = <1>; 836 #size-cells = <0>; 837 reg = <3>; 838 }; 839 }; 840 841 i2c-switch@71 { 842 compatible = "nxp,pca9546"; 843 reg = <0x71>; 844 #address-cells = <1>; 845 #size-cells = <0>; 846 channel_10_4: i2c@0 { 847 #address-cells = <1>; 848 #size-cells = <0>; 849 reg = <0>; 850 }; 851 852 channel_10_5: i2c@1 { 853 #address-cells = <1>; 854 #size-cells = <0>; 855 reg = <1>; 856 }; 857 858 channel_10_6: i2c@2 { 859 #address-cells = <1>; 860 #size-cells = <0>; 861 reg = <2>; 862 }; 863 864 channel_10_7: i2c@3 { 865 #address-cells = <1>; 866 #size-cells = <0>; 867 reg = <3>; 868 }; 869 }; 870 }; 871 872 &i2c11 { 873 status = "okay"; 874 }; 875 876 &i2c12 { 877 status = "okay"; 878 }; 879 880 &i2c13 { 881 status = "okay"; 882 }; 883 884 &pwm_tacho { 885 status = "okay"; 886 pinctrl-names = "default"; 887 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 888 &pinctrl_pwm2_default &pinctrl_pwm3_default 889 &pinctrl_pwm4_default &pinctrl_pwm5_default>; 890 891 fan@0 { 892 reg = <0x00>; 893 aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>; 894 }; 895 fan@1 { 896 reg = <0x01>; 897 aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>; 898 }; 899 fan@2 { 900 reg = <0x02>; 901 aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>; 902 }; 903 fan@3 { 904 reg = <0x03>; 905 aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>; 906 }; 907 fan@4 { 908 reg = <0x04>; 909 aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>; 910 }; 911 fan@5 { 912 reg = <0x05>; 913 aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>; 914 }; 915 }; 916 917 &gpio { 918 pin_gpio_i3 { 919 gpio-hog; 920 gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>; 921 output-low; 922 line-name = "NCSI_BMC_R_SEL"; 923 }; 924 925 pin_gpio_b6 { 926 gpio-hog; 927 gpios = <ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>; 928 output-low; 929 line-name = "EN_NCSI_SWITCH_N"; 930 }; 931 }; 932 933 &video { 934 status = "okay"; 935 memory-region = <&video_engine_memory>; 936 }; 937 938 &vhub { 939 status = "okay"; 940 };
Cache object: c7c5696d7a134da23c22b86a9dd83da2
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