1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
6
7 / {
8 model = "Mihawk BMC";
9 compatible = "ibm,mihawk-bmc", "aspeed,ast2500";
10
11 aliases {
12 i2c215 = &bus6_mux215;
13 i2c216 = &bus6_mux216;
14 i2c217 = &bus6_mux217;
15 i2c218 = &bus6_mux218;
16 i2c219 = &bus6_mux219;
17 i2c220 = &bus6_mux220;
18 i2c221 = &bus6_mux221;
19 i2c222 = &bus6_mux222;
20 i2c223 = &bus7_mux223;
21 i2c224 = &bus7_mux224;
22 i2c225 = &bus7_mux225;
23 i2c226 = &bus7_mux226;
24 i2c227 = &bus7_mux227;
25 i2c228 = &bus7_mux228;
26 i2c229 = &bus7_mux229;
27 i2c230 = &bus7_mux230;
28 i2c231 = &bus9_mux231;
29 i2c232 = &bus9_mux232;
30 i2c233 = &bus9_mux233;
31 i2c234 = &bus9_mux234;
32 i2c235 = &bus9_mux235;
33 i2c236 = &bus9_mux236;
34 i2c237 = &bus9_mux237;
35 i2c238 = &bus9_mux238;
36 i2c239 = &bus10_mux239;
37 i2c240 = &bus10_mux240;
38 i2c241 = &bus10_mux241;
39 i2c242 = &bus10_mux242;
40 i2c243 = &bus10_mux243;
41 i2c244 = &bus10_mux244;
42 i2c245 = &bus10_mux245;
43 i2c246 = &bus10_mux246;
44 i2c247 = &bus12_mux247;
45 i2c248 = &bus12_mux248;
46 i2c249 = &bus12_mux249;
47 i2c250 = &bus12_mux250;
48 i2c251 = &bus13_mux251;
49 i2c252 = &bus13_mux252;
50 i2c253 = &bus13_mux253;
51 i2c254 = &bus13_mux254;
52 i2c255 = &bus13_mux255;
53 i2c256 = &bus13_mux256;
54 i2c257 = &bus13_mux257;
55 i2c258 = &bus13_mux258;
56 };
57
58 chosen {
59 stdout-path = &uart5;
60 bootargs = "console=ttyS4,115200 earlycon";
61 };
62
63 memory@80000000 {
64 reg = <0x80000000 0x20000000>;
65 };
66
67 reserved-memory {
68 #address-cells = <1>;
69 #size-cells = <1>;
70 ranges;
71
72 flash_memory: region@98000000 {
73 no-map;
74 reg = <0x98000000 0x04000000>; /* 64M */
75 };
76
77 gfx_memory: framebuffer {
78 size = <0x01000000>;
79 alignment = <0x01000000>;
80 compatible = "shared-dma-pool";
81 reusable;
82 };
83
84 video_engine_memory: jpegbuffer {
85 size = <0x02000000>;
86 alignment = <0x01000000>;
87 compatible = "shared-dma-pool";
88 reusable;
89 };
90 };
91
92 gpio-keys {
93 compatible = "gpio-keys";
94
95 event-air-water {
96 label = "air-water";
97 gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
98 linux,code = <ASPEED_GPIO(F, 6)>;
99 };
100
101 event-checkstop {
102 label = "checkstop";
103 gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
104 linux,code = <ASPEED_GPIO(J, 2)>;
105 };
106
107 event-ps0-presence {
108 label = "ps0-presence";
109 gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
110 linux,code = <ASPEED_GPIO(Z, 2)>;
111 };
112
113 event-ps1-presence {
114 label = "ps1-presence";
115 gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
116 linux,code = <ASPEED_GPIO(Z, 0)>;
117 };
118
119 button-id {
120 label = "id-button";
121 gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
122 linux,code = <ASPEED_GPIO(F, 1)>;
123 };
124 };
125
126 gpio-keys-polled {
127 compatible = "gpio-keys-polled";
128 poll-interval = <1000>;
129
130 event-fan0-presence {
131 label = "fan0-presence";
132 gpios = <&pca9552 9 GPIO_ACTIVE_LOW>;
133 linux,code = <9>;
134 };
135
136 event-fan1-presence {
137 label = "fan1-presence";
138 gpios = <&pca9552 10 GPIO_ACTIVE_LOW>;
139 linux,code = <10>;
140 };
141
142 event-fan2-presence {
143 label = "fan2-presence";
144 gpios = <&pca9552 11 GPIO_ACTIVE_LOW>;
145 linux,code = <11>;
146 };
147
148 event-fan3-presence {
149 label = "fan3-presence";
150 gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
151 linux,code = <12>;
152 };
153
154 event-fan4-presence {
155 label = "fan4-presence";
156 gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
157 linux,code = <13>;
158 };
159
160 event-fan5-presence {
161 label = "fan5-presence";
162 gpios = <&pca9552 14 GPIO_ACTIVE_LOW>;
163 linux,code = <14>;
164 };
165 };
166
167 leds {
168 compatible = "gpio-leds";
169
170 front-fault {
171 retain-state-shutdown;
172 default-state = "keep";
173 gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
174 };
175
176 power-button {
177 retain-state-shutdown;
178 default-state = "keep";
179 gpios = <&gpio ASPEED_GPIO(AA, 1) GPIO_ACTIVE_LOW>;
180 };
181
182 front-id {
183 retain-state-shutdown;
184 default-state = "keep";
185 gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
186 };
187
188
189 fan0 {
190 retain-state-shutdown;
191 default-state = "keep";
192 gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
193 };
194
195 fan1 {
196 retain-state-shutdown;
197 default-state = "keep";
198 gpios = <&pca9552 1 GPIO_ACTIVE_LOW>;
199 };
200
201 fan2 {
202 retain-state-shutdown;
203 default-state = "keep";
204 gpios = <&pca9552 2 GPIO_ACTIVE_LOW>;
205 };
206
207 fan3 {
208 retain-state-shutdown;
209 default-state = "keep";
210 gpios = <&pca9552 3 GPIO_ACTIVE_LOW>;
211 };
212
213 fan4 {
214 retain-state-shutdown;
215 default-state = "keep";
216 gpios = <&pca9552 4 GPIO_ACTIVE_LOW>;
217 };
218
219 fan5 {
220 retain-state-shutdown;
221 default-state = "keep";
222 gpios = <&pca9552 5 GPIO_ACTIVE_LOW>;
223 };
224 };
225
226 fsi: gpio-fsi {
227 compatible = "fsi-master-gpio", "fsi-master";
228 #address-cells = <2>;
229 #size-cells = <0>;
230 no-gpio-delays;
231
232 clock-gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>;
233 data-gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_HIGH>;
234 mux-gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
235 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
236 trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
237 };
238 iio-hwmon-12v {
239 compatible = "iio-hwmon";
240 io-channels = <&adc 0>;
241 };
242
243 iio-hwmon-5v {
244 compatible = "iio-hwmon";
245 io-channels = <&adc 1>;
246 };
247
248 iio-hwmon-3v {
249 compatible = "iio-hwmon";
250 io-channels = <&adc 2>;
251 };
252
253 iio-hwmon-vdd0 {
254 compatible = "iio-hwmon";
255 io-channels = <&adc 3>;
256 };
257
258 iio-hwmon-vdd1 {
259 compatible = "iio-hwmon";
260 io-channels = <&adc 4>;
261 };
262
263 iio-hwmon-vcs0 {
264 compatible = "iio-hwmon";
265 io-channels = <&adc 5>;
266 };
267
268 iio-hwmon-vcs1 {
269 compatible = "iio-hwmon";
270 io-channels = <&adc 6>;
271 };
272
273 iio-hwmon-vdn0 {
274 compatible = "iio-hwmon";
275 io-channels = <&adc 7>;
276 };
277
278 iio-hwmon-vdn1 {
279 compatible = "iio-hwmon";
280 io-channels = <&adc 8>;
281 };
282
283 iio-hwmon-vio0 {
284 compatible = "iio-hwmon";
285 io-channels = <&adc 9>;
286 };
287
288 iio-hwmon-vio1 {
289 compatible = "iio-hwmon";
290 io-channels = <&adc 10>;
291 };
292
293 iio-hwmon-vddra {
294 compatible = "iio-hwmon";
295 io-channels = <&adc 11>;
296 };
297
298 iio-hwmon-battery {
299 compatible = "iio-hwmon";
300 io-channels = <&adc 12>;
301 };
302
303 iio-hwmon-vddrb {
304 compatible = "iio-hwmon";
305 io-channels = <&adc 13>;
306 };
307
308 iio-hwmon-vddrc {
309 compatible = "iio-hwmon";
310 io-channels = <&adc 14>;
311 };
312
313 iio-hwmon-vddrd {
314 compatible = "iio-hwmon";
315 io-channels = <&adc 15>;
316 };
317 };
318
319 &pwm_tacho {
320 status = "okay";
321 pinctrl-names = "default";
322 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
323 &pinctrl_pwm2_default &pinctrl_pwm3_default
324 &pinctrl_pwm4_default &pinctrl_pwm5_default>;
325
326 fan@0 {
327 reg = <0x00>;
328 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
329 };
330
331 fan@1 {
332 reg = <0x01>;
333 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
334 };
335
336 fan@2 {
337 reg = <0x02>;
338 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
339 };
340
341 fan@3 {
342 reg = <0x03>;
343 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
344 };
345
346 fan@4 {
347 reg = <0x04>;
348 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
349 };
350
351 fan@5 {
352 reg = <0x05>;
353 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
354 };
355
356 fan@6 {
357 reg = <0x00>;
358 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
359 };
360
361 fan@7 {
362 reg = <0x01>;
363 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
364 };
365
366 fan@8 {
367 reg = <0x02>;
368 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
369 };
370
371 fan@9 {
372 reg = <0x03>;
373 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
374 };
375
376 fan@10 {
377 reg = <0x04>;
378 aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
379 };
380
381 fan@11 {
382 reg = <0x05>;
383 aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
384 };
385 };
386
387 &gpio {
388 gpio-line-names =
389 /*A0-A7*/ "","cfam-reset","","","","","","",
390 /*B0-B7*/ "","","","","","","","",
391 /*C0-C7*/ "","","","","","","","",
392 /*D0-D7*/ "fsi-enable","","","","","","","",
393 /*E0-E7*/ "","","","","","fsi-mux","fsi-clock","fsi-data",
394 /*F0-F7*/ "","id-button","","","","","air-water","",
395 /*G0-G7*/ "","","","","","","","",
396 /*H0-H7*/ "","","","","","","","",
397 /*I0-I7*/ "","","","","","","","",
398 /*J0-J7*/ "","","checkstop","","","","","",
399 /*K0-K7*/ "","","","","","","","",
400 /*L0-L7*/ "","","","","","","","",
401 /*M0-M7*/ "","","","","","","","",
402 /*N0-N7*/ "","","","","","","","",
403 /*O0-O7*/ "","","","","","","","",
404 /*P0-P7*/ "","","","","","","","",
405 /*Q0-Q7*/ "","","","","","","","",
406 /*R0-R7*/ "","","fsi-trans","","","","","",
407 /*S0-S7*/ "","","","","","","","",
408 /*T0-T7*/ "","","","","","","","",
409 /*U0-U7*/ "","","","","","","","",
410 /*V0-V7*/ "","","","","","","","",
411 /*W0-W7*/ "","","","","","","","",
412 /*X0-X7*/ "","","","","","","","",
413 /*Y0-Y7*/ "","","","","","","","",
414 /*Z0-Z7*/ "presence-ps1","","presence-ps0","","","","","",
415 /*AA0-AA7*/ "led-front-fault","power-button","led-front-id","","","","","",
416 /*AB0-AB7*/ "","","","","","","","",
417 /*AC0-AC7*/ "","","","","","","","";
418 };
419
420 &fmc {
421 status = "okay";
422 flash@0 {
423 status = "okay";
424 label = "bmc";
425 m25p,fast-read;
426 spi-max-frequency = <50000000>;
427 partitions {
428 #address-cells = < 1 >;
429 #size-cells = < 1 >;
430 compatible = "fixed-partitions";
431 u-boot@0 {
432 reg = < 0 0x60000 >;
433 label = "u-boot";
434 };
435 u-boot-env@60000 {
436 reg = < 0x60000 0x20000 >;
437 label = "u-boot-env";
438 };
439 obmc-ubi@80000 {
440 reg = < 0x80000 0x1F80000 >;
441 label = "obmc-ubi";
442 };
443 };
444 };
445 flash@1 {
446 status = "okay";
447 label = "alt-bmc";
448 m25p,fast-read;
449 spi-max-frequency = <50000000>;
450 partitions {
451 #address-cells = < 1 >;
452 #size-cells = < 1 >;
453 compatible = "fixed-partitions";
454 u-boot@0 {
455 reg = < 0 0x60000 >;
456 label = "alt-u-boot";
457 };
458 u-boot-env@60000 {
459 reg = < 0x60000 0x20000 >;
460 label = "alt-u-boot-env";
461 };
462 obmc-ubi@80000 {
463 reg = < 0x80000 0x1F80000 >;
464 label = "alt-obmc-ubi";
465 };
466 };
467 };
468 };
469
470 &spi1 {
471 status = "okay";
472 pinctrl-names = "default";
473 pinctrl-0 = <&pinctrl_spi1_default>;
474
475 flash@0 {
476 status = "okay";
477 label = "pnor";
478 m25p,fast-read;
479 spi-max-frequency = <100000000>;
480 };
481 };
482
483 &lpc_ctrl {
484 status = "okay";
485 memory-region = <&flash_memory>;
486 flash = <&spi1>;
487 };
488
489 &uart1 {
490 /* Rear RS-232 connector */
491 status = "okay";
492
493 pinctrl-names = "default";
494 pinctrl-0 = <&pinctrl_txd1_default
495 &pinctrl_rxd1_default
496 &pinctrl_nrts1_default
497 &pinctrl_ndtr1_default
498 &pinctrl_ndsr1_default
499 &pinctrl_ncts1_default
500 &pinctrl_ndcd1_default
501 &pinctrl_nri1_default>;
502 };
503
504 &uart2 {
505 /* APSS */
506 status = "okay";
507
508 pinctrl-names = "default";
509 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
510 };
511
512 &uart5 {
513 status = "okay";
514 };
515
516 &mac0 {
517 status = "okay";
518
519 pinctrl-names = "default";
520 pinctrl-0 = <&pinctrl_rmii1_default>;
521 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
522 <&syscon ASPEED_CLK_MAC1RCLK>;
523 clock-names = "MACCLK", "RCLK";
524 use-ncsi;
525 };
526
527 &mac1 {
528 status = "okay";
529
530 pinctrl-names = "default";
531 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
532 };
533
534 &i2c0 {
535 status = "disabled";
536 };
537
538 &i2c1 {
539 status = "disabled";
540 };
541
542 &i2c2 {
543 status = "okay";
544
545 /* SAMTEC P0 */
546 /* SAMTEC P1 */
547
548 };
549
550 &i2c3 {
551 status = "okay";
552
553 /* APSS */
554 /* CPLD */
555
556 /* PCA9516 (repeater) ->
557 * CLK Buffer 9FGS9092
558 * CLK Buffer 9DBL0651BKILFT
559 * CLK Buffer 9DBL0651BKILFT
560 * Power Supply 0
561 * Power Supply 1
562 * PCA 9552 LED
563 */
564
565 power-supply@58 {
566 compatible = "ibm,cffps1";
567 reg = <0x58>;
568 };
569
570 power-supply@5b {
571 compatible = "ibm,cffps1";
572 reg = <0x5b>;
573 };
574
575 pca9552: pca9552@60 {
576 compatible = "nxp,pca9552";
577 reg = <0x60>;
578 #address-cells = <1>;
579 #size-cells = <0>;
580 gpio-controller;
581 #gpio-cells = <2>;
582
583 gpio@0 {
584 reg = <0>;
585 type = <PCA955X_TYPE_GPIO>;
586 };
587 gpio@1 {
588 reg = <1>;
589 type = <PCA955X_TYPE_GPIO>;
590 };
591 gpio@2 {
592 reg = <2>;
593 type = <PCA955X_TYPE_GPIO>;
594 };
595 gpio@3 {
596 reg = <3>;
597 type = <PCA955X_TYPE_GPIO>;
598 };
599 gpio@4 {
600 reg = <4>;
601 type = <PCA955X_TYPE_GPIO>;
602 };
603 gpio@5 {
604 reg = <5>;
605 type = <PCA955X_TYPE_GPIO>;
606 };
607 gpio@6 {
608 reg = <6>;
609 type = <PCA955X_TYPE_GPIO>;
610 };
611 gpio@7 {
612 reg = <7>;
613 type = <PCA955X_TYPE_GPIO>;
614 };
615 gpio@8 {
616 reg = <8>;
617 type = <PCA955X_TYPE_GPIO>;
618 };
619 gpio@9 {
620 reg = <9>;
621 type = <PCA955X_TYPE_GPIO>;
622 };
623 gpio@10 {
624 reg = <10>;
625 type = <PCA955X_TYPE_GPIO>;
626 };
627 gpio@11 {
628 reg = <11>;
629 type = <PCA955X_TYPE_GPIO>;
630 };
631 gpio@12 {
632 reg = <12>;
633 type = <PCA955X_TYPE_GPIO>;
634 };
635 gpio@13 {
636 reg = <13>;
637 type = <PCA955X_TYPE_GPIO>;
638 };
639 gpio@14 {
640 reg = <14>;
641 type = <PCA955X_TYPE_GPIO>;
642 };
643 gpio@15 {
644 reg = <15>;
645 type = <PCA955X_TYPE_GPIO>;
646 };
647
648 };
649
650 };
651
652 &i2c4 {
653 status = "okay";
654
655 /* CP0 VDD & VCS : IR35221 */
656 /* CP0 VDN : IR35221 */
657 /* CP0 VIO : IR38064 */
658 /* CP0 VDDR : PXM1330 */
659
660 ir35221@70 {
661 compatible = "infineon,ir35221";
662 reg = <0x70>;
663 };
664
665 ir35221@72 {
666 compatible = "infineon,ir35221";
667 reg = <0x72>;
668 };
669
670 };
671
672 &i2c5 {
673 status = "okay";
674
675 /* CP0 VDD & VCS : IR35221 */
676 /* CP0 VDN : IR35221 */
677 /* CP0 VIO : IR38064 */
678 /* CP0 VDDR : PXM1330 */
679
680 ir35221@70 {
681 compatible = "infineon,ir35221";
682 reg = <0x70>;
683 };
684
685 ir35221@72 {
686 compatible = "infineon,ir35221";
687 reg = <0x72>;
688 };
689
690 };
691
692 &i2c6 {
693 status = "okay";
694
695 /* pca9548 -> NVMe1 to 8 */
696
697 pca9548@70 {
698 compatible = "nxp,pca9548";
699 #address-cells = <1>;
700 #size-cells = <0>;
701 reg = <0x70>;
702
703 bus7_mux223: i2c@0 {
704 #address-cells = <1>;
705 #size-cells = <0>;
706 reg = <0>;
707 };
708
709 bus7_mux224: i2c@1 {
710 #address-cells = <1>;
711 #size-cells = <0>;
712 reg = <1>;
713 };
714
715 bus7_mux225: i2c@2 {
716 #address-cells = <1>;
717 #size-cells = <0>;
718 reg = <2>;
719 };
720
721 bus7_mux226: i2c@3 {
722 #address-cells = <1>;
723 #size-cells = <0>;
724 reg = <3>;
725 };
726
727 bus7_mux227: i2c@4 {
728 #address-cells = <1>;
729 #size-cells = <0>;
730 reg = <4>;
731 };
732
733 bus7_mux228: i2c@5 {
734 #address-cells = <1>;
735 #size-cells = <0>;
736 reg = <5>;
737 };
738
739 bus7_mux229: i2c@6 {
740 #address-cells = <1>;
741 #size-cells = <0>;
742 reg = <6>;
743 };
744
745 bus7_mux230: i2c@7 {
746 #address-cells = <1>;
747 #size-cells = <0>;
748 reg = <7>;
749 };
750 };
751
752 };
753
754 &i2c7 {
755 status = "okay";
756
757 /* pca9548 -> NVMe9 to 16 */
758
759 pca9548@70 {
760 compatible = "nxp,pca9548";
761 #address-cells = <1>;
762 #size-cells = <0>;
763 reg = <0x70>;
764
765 bus6_mux215: i2c@0 {
766 #address-cells = <1>;
767 #size-cells = <0>;
768 reg = <0>;
769 };
770
771 bus6_mux216: i2c@1 {
772 #address-cells = <1>;
773 #size-cells = <0>;
774 reg = <1>;
775 };
776
777 bus6_mux217: i2c@2 {
778 #address-cells = <1>;
779 #size-cells = <0>;
780 reg = <2>;
781 };
782
783 bus6_mux218: i2c@3 {
784 #address-cells = <1>;
785 #size-cells = <0>;
786 reg = <3>;
787 };
788
789 bus6_mux219: i2c@4 {
790 #address-cells = <1>;
791 #size-cells = <0>;
792 reg = <4>;
793 };
794
795 bus6_mux220: i2c@5 {
796 #address-cells = <1>;
797 #size-cells = <0>;
798 reg = <5>;
799 };
800
801 bus6_mux221: i2c@6 {
802 #address-cells = <1>;
803 #size-cells = <0>;
804 reg = <6>;
805 };
806
807 bus6_mux222: i2c@7 {
808 #address-cells = <1>;
809 #size-cells = <0>;
810 reg = <7>;
811 };
812 };
813
814 };
815
816 &i2c8 {
817 status = "okay";
818
819 eeprom@50 {
820 compatible = "atmel,24c64";
821 reg = <0x50>;
822 };
823 };
824
825 &i2c9 {
826 status = "okay";
827
828 /* pca9545 Riser ->
829 * PCIe x8 Slot3
830 * PCIe x16 slot4
831 * PCIe x8 slot5
832 * I2C BMC RISER PCA9554
833 * BMC SCL/SDA PCA9554
834 * PCA9554
835 */
836
837 /* pca9545 ->
838 * PCIe x16 Slot1
839 * PCIe x8 slot2
840 * PEX8748
841 */
842
843 pca9545riser@70 {
844 compatible = "nxp,pca9545";
845 #address-cells = <1>;
846 #size-cells = <0>;
847 reg = <0x70>;
848
849 i2c-mux-idle-disconnect;
850 interrupt-controller;
851 #interrupt-cells = <2>;
852
853 bus9_mux231: i2c@0 {
854 #address-cells = <1>;
855 #size-cells = <0>;
856 reg = <0>;
857
858 tca9554@39 {
859 compatible = "ti,tca9554";
860 reg = <0x39>;
861 gpio-controller;
862 #gpio-cells = <2>;
863
864 smbus0-hog {
865 gpio-hog;
866 gpios = <4 GPIO_ACTIVE_HIGH>;
867 output-high;
868 line-name = "smbus0";
869 };
870 };
871
872 tmp431@4c {
873 compatible = "ti,tmp401";
874 reg = <0x4c>;
875 };
876 };
877
878 bus9_mux232: i2c@1 {
879 #address-cells = <1>;
880 #size-cells = <0>;
881 reg = <1>;
882
883 tca9554@39 {
884 compatible = "ti,tca9554";
885 reg = <0x39>;
886 gpio-controller;
887 #gpio-cells = <2>;
888
889 smbus1-hog {
890 gpio-hog;
891 gpios = <4 GPIO_ACTIVE_HIGH>;
892 output-high;
893 line-name = "smbus1";
894 };
895 };
896
897 tmp431@4c {
898 compatible = "ti,tmp401";
899 reg = <0x4c>;
900 };
901 };
902
903 bus9_mux233: i2c@2 {
904 #address-cells = <1>;
905 #size-cells = <0>;
906 reg = <2>;
907 };
908
909 bus9_mux234: i2c@3 {
910 #address-cells = <1>;
911 #size-cells = <0>;
912 reg = <3>;
913 };
914 };
915
916 pca9545@71 {
917 compatible = "nxp,pca9545";
918 #address-cells = <1>;
919 #size-cells = <0>;
920 reg = <0x71>;
921
922 i2c-mux-idle-disconnect;
923 interrupt-controller;
924 #interrupt-cells = <2>;
925
926 bus9_mux235: i2c@0 {
927 #address-cells = <1>;
928 #size-cells = <0>;
929 reg = <0>;
930
931 tca9554@39 {
932 compatible = "ti,tca9554";
933 reg = <0x39>;
934 gpio-controller;
935 #gpio-cells = <2>;
936
937 smbus2-hog {
938 gpio-hog;
939 gpios = <4 GPIO_ACTIVE_HIGH>;
940 output-high;
941 line-name = "smbus2";
942 };
943 };
944
945 tmp431@4c {
946 compatible = "ti,tmp401";
947 reg = <0x4c>;
948 };
949 };
950
951 bus9_mux236: i2c@1 {
952 #address-cells = <1>;
953 #size-cells = <0>;
954 reg = <1>;
955
956 tca9554@39 {
957 compatible = "ti,tca9554";
958 reg = <0x39>;
959 gpio-controller;
960 #gpio-cells = <2>;
961
962 smbus3-hog {
963 gpio-hog;
964 gpios = <4 GPIO_ACTIVE_HIGH>;
965 output-high;
966 line-name = "smbus3";
967 };
968 };
969
970 tmp431@4c {
971 compatible = "ti,tmp401";
972 reg = <0x4c>;
973 };
974 };
975
976 bus9_mux237: i2c@2 {
977 #address-cells = <1>;
978 #size-cells = <0>;
979 reg = <2>;
980 };
981
982 bus9_mux238: i2c@3 {
983 #address-cells = <1>;
984 #size-cells = <0>;
985 reg = <3>;
986 };
987 };
988 };
989
990 &i2c10 {
991 status = "okay";
992
993 /* pca9545 Riser ->
994 * PCIe x8 Slot8
995 * PCIe x16 slot9
996 * PCIe x8 slot10
997 * I2C BMC RISER PCA9554
998 * BMC SCL/SDA PCA9554
999 * PCA9554
1000 */
1001
1002 /* pca9545 ->
1003 * PCIe x16 Slot1
1004 * PCIe x8 slot2
1005 * PEX8748
1006 */
1007
1008 pca9545riser@70 {
1009 compatible = "nxp,pca9545";
1010 #address-cells = <1>;
1011 #size-cells = <0>;
1012 reg = <0x70>;
1013
1014 i2c-mux-idle-disconnect;
1015 interrupt-controller;
1016 #interrupt-cells = <2>;
1017
1018 bus10_mux239: i2c@0 {
1019 #address-cells = <1>;
1020 #size-cells = <0>;
1021 reg = <0>;
1022
1023 tca9554@39 {
1024 compatible = "ti,tca9554";
1025 reg = <0x39>;
1026 gpio-controller;
1027 #gpio-cells = <2>;
1028
1029 smbus4-hog {
1030 gpio-hog;
1031 gpios = <4 GPIO_ACTIVE_HIGH>;
1032 output-high;
1033 line-name = "smbus4";
1034 };
1035 };
1036
1037 tmp431@4c {
1038 compatible = "ti,tmp401";
1039 reg = <0x4c>;
1040 };
1041 };
1042
1043 bus10_mux240: i2c@1 {
1044 #address-cells = <1>;
1045 #size-cells = <0>;
1046 reg = <1>;
1047
1048 tca9554@39 {
1049 compatible = "ti,tca9554";
1050 reg = <0x39>;
1051 gpio-controller;
1052 #gpio-cells = <2>;
1053
1054 smbus5-hog {
1055 gpio-hog;
1056 gpios = <4 GPIO_ACTIVE_HIGH>;
1057 output-high;
1058 line-name = "smbus5";
1059 };
1060 };
1061
1062 tmp431@4c {
1063 compatible = "ti,tmp401";
1064 reg = <0x4c>;
1065 };
1066 };
1067
1068 bus10_mux241: i2c@2 {
1069 #address-cells = <1>;
1070 #size-cells = <0>;
1071 reg = <2>;
1072 };
1073
1074 bus10_mux242: i2c@3 {
1075 #address-cells = <1>;
1076 #size-cells = <0>;
1077 reg = <3>;
1078 };
1079 };
1080
1081 pca9545@71 {
1082 compatible = "nxp,pca9545";
1083 #address-cells = <1>;
1084 #size-cells = <0>;
1085 reg = <0x71>;
1086
1087 i2c-mux-idle-disconnect;
1088 interrupt-controller;
1089 #interrupt-cells = <2>;
1090
1091 bus10_mux243: i2c@0 {
1092 #address-cells = <1>;
1093 #size-cells = <0>;
1094 reg = <0>;
1095
1096 tca9554@39 {
1097 compatible = "ti,tca9554";
1098 reg = <0x39>;
1099 gpio-controller;
1100 #gpio-cells = <2>;
1101
1102 smbus6-hog {
1103 gpio-hog;
1104 gpios = <4 GPIO_ACTIVE_HIGH>;
1105 output-high;
1106 line-name = "smbus6";
1107 };
1108 };
1109
1110 tmp431@4c {
1111 compatible = "ti,tmp401";
1112 reg = <0x4c>;
1113 };
1114 };
1115
1116 bus10_mux244: i2c@1 {
1117 #address-cells = <1>;
1118 #size-cells = <0>;
1119 reg = <1>;
1120
1121 tca9554@39 {
1122 compatible = "ti,tca9554";
1123 reg = <0x39>;
1124 gpio-controller;
1125 #gpio-cells = <2>;
1126
1127 smbus7-hog {
1128 gpio-hog;
1129 gpios = <4 GPIO_ACTIVE_HIGH>;
1130 output-high;
1131 line-name = "smbus7";
1132 };
1133 };
1134
1135 tmp431@4c {
1136 compatible = "ti,tmp401";
1137 reg = <0x4c>;
1138 };
1139 };
1140
1141 bus10_mux245: i2c@2 {
1142 #address-cells = <1>;
1143 #size-cells = <0>;
1144 reg = <2>;
1145 };
1146
1147 bus10_mux246: i2c@3 {
1148 #address-cells = <1>;
1149 #size-cells = <0>;
1150 reg = <3>;
1151 };
1152 };
1153 };
1154
1155 &i2c11 {
1156 status = "okay";
1157
1158 /* TPM */
1159 /* RTC RX8900CE */
1160 /* FPGA for power sequence */
1161 /* TMP275A */
1162 /* TMP275A */
1163 /* EMC1462 */
1164
1165 tpm@57 {
1166 compatible = "infineon,slb9645tt";
1167 reg = <0x57>;
1168 };
1169
1170 rtc@32 {
1171 compatible = "epson,rx8900";
1172 reg = <0x32>;
1173 };
1174
1175 tmp275@48 {
1176 compatible = "ti,tmp275";
1177 reg = <0x48>;
1178 };
1179
1180 tmp275@49 {
1181 compatible = "ti,tmp275";
1182 reg = <0x49>;
1183 };
1184
1185 /* chip emc1462 use emc1403 driver */
1186 emc1403@4c {
1187 compatible = "smsc,emc1403";
1188 reg = <0x4c>;
1189 };
1190
1191 };
1192
1193 &i2c12 {
1194 status = "okay";
1195
1196 /* pca9545 ->
1197 * SAS BP1
1198 * SAS BP2
1199 * NVMe BP
1200 * M.2 riser
1201 */
1202
1203 pca9545@70 {
1204 compatible = "nxp,pca9545";
1205 #address-cells = <1>;
1206 #size-cells = <0>;
1207 reg = <0x70>;
1208
1209 interrupt-controller;
1210 #interrupt-cells = <2>;
1211
1212 bus12_mux247: i2c@0 {
1213 #address-cells = <1>;
1214 #size-cells = <0>;
1215 reg = <0>;
1216
1217 eeprom@50 {
1218 compatible = "atmel,24c64";
1219 reg = <0x50>;
1220 };
1221 };
1222
1223 bus12_mux248: i2c@1 {
1224 #address-cells = <1>;
1225 #size-cells = <0>;
1226 reg = <1>;
1227
1228 eeprom@50 {
1229 compatible = "atmel,24c64";
1230 reg = <0x50>;
1231 };
1232 };
1233
1234 bus12_mux249: i2c@2 {
1235 #address-cells = <1>;
1236 #size-cells = <0>;
1237 reg = <2>;
1238
1239 eeprom@50 {
1240 compatible = "atmel,24c64";
1241 reg = <0x50>;
1242 };
1243 };
1244
1245 bus12_mux250: i2c@3 {
1246 #address-cells = <1>;
1247 #size-cells = <0>;
1248 reg = <3>;
1249
1250 tmp275@48 {
1251 compatible = "ti,tmp275";
1252 reg = <0x48>;
1253 };
1254 };
1255
1256 };
1257
1258 };
1259
1260 &i2c13 {
1261 status = "okay";
1262
1263 /* pca9548 ->
1264 * NVMe BP
1265 * NVMe HDD17 to 24
1266 */
1267
1268 pca9548@70 {
1269 compatible = "nxp,pca9548";
1270 #address-cells = <1>;
1271 #size-cells = <0>;
1272 reg = <0x70>;
1273 bus13_mux251: i2c@0 {
1274 #address-cells = <1>;
1275 #size-cells = <0>;
1276 reg = <0>;
1277 };
1278
1279 bus13_mux252: i2c@1 {
1280 #address-cells = <1>;
1281 #size-cells = <0>;
1282 reg = <1>;
1283 };
1284
1285 bus13_mux253: i2c@2 {
1286 #address-cells = <1>;
1287 #size-cells = <0>;
1288 reg = <2>;
1289 };
1290
1291 bus13_mux254: i2c@3 {
1292 #address-cells = <1>;
1293 #size-cells = <0>;
1294 reg = <3>;
1295 };
1296
1297 bus13_mux255: i2c@4 {
1298 #address-cells = <1>;
1299 #size-cells = <0>;
1300 reg = <4>;
1301 };
1302
1303 bus13_mux256: i2c@5 {
1304 #address-cells = <1>;
1305 #size-cells = <0>;
1306 reg = <5>;
1307 };
1308
1309 bus13_mux257: i2c@6 {
1310 #address-cells = <1>;
1311 #size-cells = <0>;
1312 reg = <6>;
1313 };
1314
1315 bus13_mux258: i2c@7 {
1316 #address-cells = <1>;
1317 #size-cells = <0>;
1318 reg = <7>;
1319 };
1320 };
1321 };
1322
1323 &vuart {
1324 status = "okay";
1325 };
1326
1327 &gfx {
1328 status = "okay";
1329 memory-region = <&gfx_memory>;
1330 };
1331
1332 &adc {
1333 status = "okay";
1334 pinctrl-names = "default";
1335 pinctrl-0 = <&pinctrl_adc0_default
1336 &pinctrl_adc1_default
1337 &pinctrl_adc2_default
1338 &pinctrl_adc3_default
1339 &pinctrl_adc4_default
1340 &pinctrl_adc5_default
1341 &pinctrl_adc6_default
1342 &pinctrl_adc7_default
1343 &pinctrl_adc8_default
1344 &pinctrl_adc9_default
1345 &pinctrl_adc10_default
1346 &pinctrl_adc11_default
1347 &pinctrl_adc12_default
1348 &pinctrl_adc13_default
1349 &pinctrl_adc14_default
1350 &pinctrl_adc15_default>;
1351 };
1352
1353 &wdt1 {
1354 aspeed,reset-type = "none";
1355 aspeed,external-signal;
1356 aspeed,ext-push-pull;
1357 aspeed,ext-active-high;
1358
1359 pinctrl-names = "default";
1360 pinctrl-0 = <&pinctrl_wdtrst1_default>;
1361 };
1362
1363 &wdt2 {
1364 aspeed,alt-boot;
1365 };
1366
1367 &ibt {
1368 status = "okay";
1369 };
1370
1371 &vhub {
1372 status = "okay";
1373 };
1374
1375 &video {
1376 status = "okay";
1377 memory-region = <&video_engine_memory>;
1378 };
1379
1380 #include "ibm-power9-dual.dtsi"
1381
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