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sys/contrib/device-tree/src/arm/aspeed-g6.dtsi
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1 // SPDX-License-Identifier: GPL-2.0-or-later 2 // Copyright 2019 IBM Corp. 3 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6 #include <dt-bindings/clock/ast2600-clock.h> 7 8 / { 9 model = "Aspeed BMC"; 10 compatible = "aspeed,ast2600"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 14 15 aliases { 16 i2c0 = &i2c0; 17 i2c1 = &i2c1; 18 i2c2 = &i2c2; 19 i2c3 = &i2c3; 20 i2c4 = &i2c4; 21 i2c5 = &i2c5; 22 i2c6 = &i2c6; 23 i2c7 = &i2c7; 24 i2c8 = &i2c8; 25 i2c9 = &i2c9; 26 i2c10 = &i2c10; 27 i2c11 = &i2c11; 28 i2c12 = &i2c12; 29 i2c13 = &i2c13; 30 i2c14 = &i2c14; 31 i2c15 = &i2c15; 32 serial0 = &uart1; 33 serial1 = &uart2; 34 serial2 = &uart3; 35 serial3 = &uart4; 36 serial4 = &uart5; 37 serial5 = &vuart1; 38 serial6 = &vuart2; 39 }; 40 41 42 cpus { 43 #address-cells = <1>; 44 #size-cells = <0>; 45 enable-method = "aspeed,ast2600-smp"; 46 47 cpu@f00 { 48 compatible = "arm,cortex-a7"; 49 device_type = "cpu"; 50 reg = <0xf00>; 51 }; 52 53 cpu@f01 { 54 compatible = "arm,cortex-a7"; 55 device_type = "cpu"; 56 reg = <0xf01>; 57 }; 58 }; 59 60 timer { 61 compatible = "arm,armv7-timer"; 62 interrupt-parent = <&gic>; 63 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 64 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 65 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 66 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 67 clocks = <&syscon ASPEED_CLK_HPLL>; 68 arm,cpu-registers-not-fw-configured; 69 always-on; 70 }; 71 72 edac: sdram@1e6e0000 { 73 compatible = "aspeed,ast2600-sdram-edac", "syscon"; 74 reg = <0x1e6e0000 0x174>; 75 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 76 }; 77 78 ahb { 79 compatible = "simple-bus"; 80 #address-cells = <1>; 81 #size-cells = <1>; 82 device_type = "soc"; 83 ranges; 84 85 gic: interrupt-controller@40461000 { 86 compatible = "arm,cortex-a7-gic"; 87 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 88 #interrupt-cells = <3>; 89 interrupt-controller; 90 interrupt-parent = <&gic>; 91 reg = <0x40461000 0x1000>, 92 <0x40462000 0x1000>, 93 <0x40464000 0x2000>, 94 <0x40466000 0x2000>; 95 }; 96 97 fmc: spi@1e620000 { 98 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; 99 #address-cells = <1>; 100 #size-cells = <0>; 101 compatible = "aspeed,ast2600-fmc"; 102 clocks = <&syscon ASPEED_CLK_AHB>; 103 status = "disabled"; 104 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 105 flash@0 { 106 reg = < 0 >; 107 compatible = "jedec,spi-nor"; 108 spi-max-frequency = <50000000>; 109 spi-rx-bus-width = <2>; 110 status = "disabled"; 111 }; 112 flash@1 { 113 reg = < 1 >; 114 compatible = "jedec,spi-nor"; 115 spi-max-frequency = <50000000>; 116 spi-rx-bus-width = <2>; 117 status = "disabled"; 118 }; 119 flash@2 { 120 reg = < 2 >; 121 compatible = "jedec,spi-nor"; 122 spi-max-frequency = <50000000>; 123 spi-rx-bus-width = <2>; 124 status = "disabled"; 125 }; 126 }; 127 128 spi1: spi@1e630000 { 129 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>; 130 #address-cells = <1>; 131 #size-cells = <0>; 132 compatible = "aspeed,ast2600-spi"; 133 clocks = <&syscon ASPEED_CLK_AHB>; 134 status = "disabled"; 135 flash@0 { 136 reg = < 0 >; 137 compatible = "jedec,spi-nor"; 138 spi-max-frequency = <50000000>; 139 spi-rx-bus-width = <2>; 140 status = "disabled"; 141 }; 142 flash@1 { 143 reg = < 1 >; 144 compatible = "jedec,spi-nor"; 145 spi-max-frequency = <50000000>; 146 spi-rx-bus-width = <2>; 147 status = "disabled"; 148 }; 149 }; 150 151 spi2: spi@1e631000 { 152 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>; 153 #address-cells = <1>; 154 #size-cells = <0>; 155 compatible = "aspeed,ast2600-spi"; 156 clocks = <&syscon ASPEED_CLK_AHB>; 157 status = "disabled"; 158 flash@0 { 159 reg = < 0 >; 160 compatible = "jedec,spi-nor"; 161 spi-max-frequency = <50000000>; 162 spi-rx-bus-width = <2>; 163 status = "disabled"; 164 }; 165 flash@1 { 166 reg = < 1 >; 167 compatible = "jedec,spi-nor"; 168 spi-max-frequency = <50000000>; 169 spi-rx-bus-width = <2>; 170 status = "disabled"; 171 }; 172 flash@2 { 173 reg = < 2 >; 174 compatible = "jedec,spi-nor"; 175 spi-max-frequency = <50000000>; 176 spi-rx-bus-width = <2>; 177 status = "disabled"; 178 }; 179 }; 180 181 mdio0: mdio@1e650000 { 182 compatible = "aspeed,ast2600-mdio"; 183 reg = <0x1e650000 0x8>; 184 #address-cells = <1>; 185 #size-cells = <0>; 186 status = "disabled"; 187 pinctrl-names = "default"; 188 pinctrl-0 = <&pinctrl_mdio1_default>; 189 resets = <&syscon ASPEED_RESET_MII>; 190 }; 191 192 mdio1: mdio@1e650008 { 193 compatible = "aspeed,ast2600-mdio"; 194 reg = <0x1e650008 0x8>; 195 #address-cells = <1>; 196 #size-cells = <0>; 197 status = "disabled"; 198 pinctrl-names = "default"; 199 pinctrl-0 = <&pinctrl_mdio2_default>; 200 resets = <&syscon ASPEED_RESET_MII>; 201 }; 202 203 mdio2: mdio@1e650010 { 204 compatible = "aspeed,ast2600-mdio"; 205 reg = <0x1e650010 0x8>; 206 #address-cells = <1>; 207 #size-cells = <0>; 208 status = "disabled"; 209 pinctrl-names = "default"; 210 pinctrl-0 = <&pinctrl_mdio3_default>; 211 resets = <&syscon ASPEED_RESET_MII>; 212 }; 213 214 mdio3: mdio@1e650018 { 215 compatible = "aspeed,ast2600-mdio"; 216 reg = <0x1e650018 0x8>; 217 #address-cells = <1>; 218 #size-cells = <0>; 219 status = "disabled"; 220 pinctrl-names = "default"; 221 pinctrl-0 = <&pinctrl_mdio4_default>; 222 resets = <&syscon ASPEED_RESET_MII>; 223 }; 224 225 mac0: ftgmac@1e660000 { 226 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 227 reg = <0x1e660000 0x180>; 228 #address-cells = <1>; 229 #size-cells = <0>; 230 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 231 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 232 status = "disabled"; 233 }; 234 235 mac1: ftgmac@1e680000 { 236 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 237 reg = <0x1e680000 0x180>; 238 #address-cells = <1>; 239 #size-cells = <0>; 240 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 241 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 242 status = "disabled"; 243 }; 244 245 mac2: ftgmac@1e670000 { 246 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 247 reg = <0x1e670000 0x180>; 248 #address-cells = <1>; 249 #size-cells = <0>; 250 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 251 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>; 252 status = "disabled"; 253 }; 254 255 mac3: ftgmac@1e690000 { 256 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 257 reg = <0x1e690000 0x180>; 258 #address-cells = <1>; 259 #size-cells = <0>; 260 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 261 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>; 262 status = "disabled"; 263 }; 264 265 ehci0: usb@1e6a1000 { 266 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 267 reg = <0x1e6a1000 0x100>; 268 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 269 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 270 pinctrl-names = "default"; 271 pinctrl-0 = <&pinctrl_usb2ah_default>; 272 status = "disabled"; 273 }; 274 275 ehci1: usb@1e6a3000 { 276 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 277 reg = <0x1e6a3000 0x100>; 278 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 279 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 280 pinctrl-names = "default"; 281 pinctrl-0 = <&pinctrl_usb2bh_default>; 282 status = "disabled"; 283 }; 284 285 uhci: usb@1e6b0000 { 286 compatible = "aspeed,ast2600-uhci", "generic-uhci"; 287 reg = <0x1e6b0000 0x100>; 288 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 289 #ports = <2>; 290 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 291 status = "disabled"; 292 /* 293 * No default pinmux, it will follow EHCI, use an 294 * explicit pinmux override if EHCI is not enabled. 295 */ 296 }; 297 298 vhub: usb-vhub@1e6a0000 { 299 compatible = "aspeed,ast2600-usb-vhub"; 300 reg = <0x1e6a0000 0x350>; 301 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 302 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 303 aspeed,vhub-downstream-ports = <7>; 304 aspeed,vhub-generic-endpoints = <21>; 305 pinctrl-names = "default"; 306 pinctrl-0 = <&pinctrl_usb2ad_default>; 307 status = "disabled"; 308 }; 309 310 udc: usb@1e6a2000 { 311 compatible = "aspeed,ast2600-udc"; 312 reg = <0x1e6a2000 0x300>; 313 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 314 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 315 pinctrl-names = "default"; 316 pinctrl-0 = <&pinctrl_usb2bd_default>; 317 status = "disabled"; 318 }; 319 320 apb { 321 compatible = "simple-bus"; 322 #address-cells = <1>; 323 #size-cells = <1>; 324 ranges; 325 326 syscon: syscon@1e6e2000 { 327 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd"; 328 reg = <0x1e6e2000 0x1000>; 329 ranges = <0 0x1e6e2000 0x1000>; 330 #address-cells = <1>; 331 #size-cells = <1>; 332 #clock-cells = <1>; 333 #reset-cells = <1>; 334 335 pinctrl: pinctrl { 336 compatible = "aspeed,ast2600-pinctrl"; 337 }; 338 339 silicon-id@14 { 340 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id"; 341 reg = <0x14 0x4 0x5b0 0x8>; 342 }; 343 344 smp-memram@180 { 345 compatible = "aspeed,ast2600-smpmem"; 346 reg = <0x180 0x40>; 347 }; 348 349 scu_ic0: interrupt-controller@560 { 350 #interrupt-cells = <1>; 351 compatible = "aspeed,ast2600-scu-ic0"; 352 reg = <0x560 0x4>; 353 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 354 interrupt-controller; 355 }; 356 357 scu_ic1: interrupt-controller@570 { 358 #interrupt-cells = <1>; 359 compatible = "aspeed,ast2600-scu-ic1"; 360 reg = <0x570 0x4>; 361 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 362 interrupt-controller; 363 }; 364 }; 365 366 rng: hwrng@1e6e2524 { 367 compatible = "timeriomem_rng"; 368 reg = <0x1e6e2524 0x4>; 369 period = <1>; 370 quality = <100>; 371 }; 372 373 gfx: display@1e6e6000 { 374 compatible = "aspeed,ast2600-gfx", "syscon"; 375 reg = <0x1e6e6000 0x1000>; 376 reg-io-width = <4>; 377 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; 378 resets = <&syscon ASPEED_RESET_GRAPHICS>; 379 syscon = <&syscon>; 380 status = "disabled"; 381 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 382 }; 383 384 xdma: xdma@1e6e7000 { 385 compatible = "aspeed,ast2600-xdma"; 386 reg = <0x1e6e7000 0x100>; 387 clocks = <&syscon ASPEED_CLK_GATE_BCLK>; 388 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>; 389 reset-names = "device", "root-complex"; 390 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 391 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>; 392 aspeed,pcie-device = "bmc"; 393 aspeed,scu = <&syscon>; 394 status = "disabled"; 395 }; 396 397 adc0: adc@1e6e9000 { 398 compatible = "aspeed,ast2600-adc0"; 399 reg = <0x1e6e9000 0x100>; 400 clocks = <&syscon ASPEED_CLK_APB2>; 401 resets = <&syscon ASPEED_RESET_ADC>; 402 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 403 #io-channel-cells = <1>; 404 status = "disabled"; 405 }; 406 407 adc1: adc@1e6e9100 { 408 compatible = "aspeed,ast2600-adc1"; 409 reg = <0x1e6e9100 0x100>; 410 clocks = <&syscon ASPEED_CLK_APB2>; 411 resets = <&syscon ASPEED_RESET_ADC>; 412 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 413 #io-channel-cells = <1>; 414 status = "disabled"; 415 }; 416 417 sbc: secure-boot-controller@1e6f2000 { 418 compatible = "aspeed,ast2600-sbc"; 419 reg = <0x1e6f2000 0x1000>; 420 }; 421 422 video: video@1e700000 { 423 compatible = "aspeed,ast2600-video-engine"; 424 reg = <0x1e700000 0x1000>; 425 clocks = <&syscon ASPEED_CLK_GATE_VCLK>, 426 <&syscon ASPEED_CLK_GATE_ECLK>; 427 clock-names = "vclk", "eclk"; 428 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 429 status = "disabled"; 430 }; 431 432 gpio0: gpio@1e780000 { 433 #gpio-cells = <2>; 434 gpio-controller; 435 compatible = "aspeed,ast2600-gpio"; 436 reg = <0x1e780000 0x400>; 437 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 438 gpio-ranges = <&pinctrl 0 0 208>; 439 ngpios = <208>; 440 clocks = <&syscon ASPEED_CLK_APB2>; 441 interrupt-controller; 442 #interrupt-cells = <2>; 443 }; 444 445 sgpiom0: sgpiom@1e780500 { 446 #gpio-cells = <2>; 447 gpio-controller; 448 compatible = "aspeed,ast2600-sgpiom"; 449 reg = <0x1e780500 0x100>; 450 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 451 clocks = <&syscon ASPEED_CLK_APB2>; 452 interrupt-controller; 453 bus-frequency = <12000000>; 454 pinctrl-names = "default"; 455 pinctrl-0 = <&pinctrl_sgpm1_default>; 456 status = "disabled"; 457 }; 458 459 sgpiom1: sgpiom@1e780600 { 460 #gpio-cells = <2>; 461 gpio-controller; 462 compatible = "aspeed,ast2600-sgpiom"; 463 reg = <0x1e780600 0x100>; 464 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 465 clocks = <&syscon ASPEED_CLK_APB2>; 466 interrupt-controller; 467 bus-frequency = <12000000>; 468 pinctrl-names = "default"; 469 pinctrl-0 = <&pinctrl_sgpm2_default>; 470 status = "disabled"; 471 }; 472 473 gpio1: gpio@1e780800 { 474 #gpio-cells = <2>; 475 gpio-controller; 476 compatible = "aspeed,ast2600-gpio"; 477 reg = <0x1e780800 0x800>; 478 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 479 gpio-ranges = <&pinctrl 0 208 36>; 480 ngpios = <36>; 481 clocks = <&syscon ASPEED_CLK_APB1>; 482 interrupt-controller; 483 #interrupt-cells = <2>; 484 }; 485 486 rtc: rtc@1e781000 { 487 compatible = "aspeed,ast2600-rtc"; 488 reg = <0x1e781000 0x18>; 489 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 490 status = "disabled"; 491 }; 492 493 timer: timer@1e782000 { 494 compatible = "aspeed,ast2600-timer"; 495 reg = <0x1e782000 0x90>; 496 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 497 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 498 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 499 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 500 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 501 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 502 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 503 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 504 clocks = <&syscon ASPEED_CLK_APB1>; 505 clock-names = "PCLK"; 506 status = "disabled"; 507 }; 508 509 uart1: serial@1e783000 { 510 compatible = "ns16550a"; 511 reg = <0x1e783000 0x20>; 512 reg-shift = <2>; 513 reg-io-width = <4>; 514 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 515 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 516 resets = <&lpc_reset 4>; 517 no-loopback-test; 518 pinctrl-names = "default"; 519 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>; 520 status = "disabled"; 521 }; 522 523 uart5: serial@1e784000 { 524 compatible = "ns16550a"; 525 reg = <0x1e784000 0x1000>; 526 reg-shift = <2>; 527 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 528 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 529 no-loopback-test; 530 }; 531 532 wdt1: watchdog@1e785000 { 533 compatible = "aspeed,ast2600-wdt"; 534 reg = <0x1e785000 0x40>; 535 }; 536 537 wdt2: watchdog@1e785040 { 538 compatible = "aspeed,ast2600-wdt"; 539 reg = <0x1e785040 0x40>; 540 status = "disabled"; 541 }; 542 543 wdt3: watchdog@1e785080 { 544 compatible = "aspeed,ast2600-wdt"; 545 reg = <0x1e785080 0x40>; 546 status = "disabled"; 547 }; 548 549 wdt4: watchdog@1e7850c0 { 550 compatible = "aspeed,ast2600-wdt"; 551 reg = <0x1e7850C0 0x40>; 552 status = "disabled"; 553 }; 554 555 peci0: peci-controller@1e78b000 { 556 compatible = "aspeed,ast2600-peci"; 557 reg = <0x1e78b000 0x100>; 558 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 559 clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; 560 resets = <&syscon ASPEED_RESET_PECI>; 561 cmd-timeout-ms = <1000>; 562 clock-frequency = <1000000>; 563 status = "disabled"; 564 }; 565 566 lpc: lpc@1e789000 { 567 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"; 568 reg = <0x1e789000 0x1000>; 569 reg-io-width = <4>; 570 571 #address-cells = <1>; 572 #size-cells = <1>; 573 ranges = <0x0 0x1e789000 0x1000>; 574 575 kcs1: kcs@24 { 576 compatible = "aspeed,ast2500-kcs-bmc-v2"; 577 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; 578 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 579 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 580 kcs_chan = <1>; 581 status = "disabled"; 582 }; 583 584 kcs2: kcs@28 { 585 compatible = "aspeed,ast2500-kcs-bmc-v2"; 586 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; 587 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 588 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 589 status = "disabled"; 590 }; 591 592 kcs3: kcs@2c { 593 compatible = "aspeed,ast2500-kcs-bmc-v2"; 594 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; 595 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 596 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 597 status = "disabled"; 598 }; 599 600 kcs4: kcs@114 { 601 compatible = "aspeed,ast2500-kcs-bmc-v2"; 602 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; 603 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 604 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 605 status = "disabled"; 606 }; 607 608 lpc_ctrl: lpc-ctrl@80 { 609 compatible = "aspeed,ast2600-lpc-ctrl"; 610 reg = <0x80 0x80>; 611 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 612 status = "disabled"; 613 }; 614 615 lpc_snoop: lpc-snoop@80 { 616 compatible = "aspeed,ast2600-lpc-snoop"; 617 reg = <0x80 0x80>; 618 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 619 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 620 status = "disabled"; 621 }; 622 623 lhc: lhc@a0 { 624 compatible = "aspeed,ast2600-lhc"; 625 reg = <0xa0 0x24 0xc8 0x8>; 626 }; 627 628 lpc_reset: reset-controller@98 { 629 compatible = "aspeed,ast2600-lpc-reset"; 630 reg = <0x98 0x4>; 631 #reset-cells = <1>; 632 }; 633 634 uart_routing: uart-routing@98 { 635 compatible = "aspeed,ast2600-uart-routing"; 636 reg = <0x98 0x8>; 637 status = "disabled"; 638 }; 639 640 ibt: ibt@140 { 641 compatible = "aspeed,ast2600-ibt-bmc"; 642 reg = <0x140 0x18>; 643 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 644 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 645 status = "disabled"; 646 }; 647 }; 648 649 sdc: sdc@1e740000 { 650 compatible = "aspeed,ast2600-sd-controller"; 651 reg = <0x1e740000 0x100>; 652 #address-cells = <1>; 653 #size-cells = <1>; 654 ranges = <0 0x1e740000 0x10000>; 655 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 656 status = "disabled"; 657 658 sdhci0: sdhci@1e740100 { 659 compatible = "aspeed,ast2600-sdhci", "sdhci"; 660 reg = <0x100 0x100>; 661 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 662 sdhci,auto-cmd12; 663 clocks = <&syscon ASPEED_CLK_SDIO>; 664 status = "disabled"; 665 }; 666 667 sdhci1: sdhci@1e740200 { 668 compatible = "aspeed,ast2600-sdhci", "sdhci"; 669 reg = <0x200 0x100>; 670 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 671 sdhci,auto-cmd12; 672 clocks = <&syscon ASPEED_CLK_SDIO>; 673 status = "disabled"; 674 }; 675 }; 676 677 emmc_controller: sdc@1e750000 { 678 compatible = "aspeed,ast2600-sd-controller"; 679 reg = <0x1e750000 0x100>; 680 #address-cells = <1>; 681 #size-cells = <1>; 682 ranges = <0 0x1e750000 0x10000>; 683 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>; 684 status = "disabled"; 685 686 emmc: sdhci@1e750100 { 687 compatible = "aspeed,ast2600-sdhci"; 688 reg = <0x100 0x100>; 689 sdhci,auto-cmd12; 690 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 691 clocks = <&syscon ASPEED_CLK_EMMC>; 692 pinctrl-names = "default"; 693 pinctrl-0 = <&pinctrl_emmc_default>; 694 }; 695 }; 696 697 vuart1: serial@1e787000 { 698 compatible = "aspeed,ast2500-vuart"; 699 reg = <0x1e787000 0x40>; 700 reg-shift = <2>; 701 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 702 clocks = <&syscon ASPEED_CLK_APB1>; 703 no-loopback-test; 704 status = "disabled"; 705 }; 706 707 vuart2: serial@1e788000 { 708 compatible = "aspeed,ast2500-vuart"; 709 reg = <0x1e788000 0x40>; 710 reg-shift = <2>; 711 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 712 clocks = <&syscon ASPEED_CLK_APB1>; 713 no-loopback-test; 714 status = "disabled"; 715 }; 716 717 uart2: serial@1e78d000 { 718 compatible = "ns16550a"; 719 reg = <0x1e78d000 0x20>; 720 reg-shift = <2>; 721 reg-io-width = <4>; 722 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 723 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 724 resets = <&lpc_reset 5>; 725 no-loopback-test; 726 pinctrl-names = "default"; 727 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 728 status = "disabled"; 729 }; 730 731 uart3: serial@1e78e000 { 732 compatible = "ns16550a"; 733 reg = <0x1e78e000 0x20>; 734 reg-shift = <2>; 735 reg-io-width = <4>; 736 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 737 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 738 resets = <&lpc_reset 6>; 739 no-loopback-test; 740 pinctrl-names = "default"; 741 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 742 status = "disabled"; 743 }; 744 745 uart4: serial@1e78f000 { 746 compatible = "ns16550a"; 747 reg = <0x1e78f000 0x20>; 748 reg-shift = <2>; 749 reg-io-width = <4>; 750 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 751 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 752 resets = <&lpc_reset 7>; 753 no-loopback-test; 754 pinctrl-names = "default"; 755 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>; 756 status = "disabled"; 757 }; 758 759 i2c: bus@1e78a000 { 760 compatible = "simple-bus"; 761 #address-cells = <1>; 762 #size-cells = <1>; 763 ranges = <0 0x1e78a000 0x1000>; 764 }; 765 766 fsim0: fsi@1e79b000 { 767 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 768 reg = <0x1e79b000 0x94>; 769 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 770 pinctrl-names = "default"; 771 pinctrl-0 = <&pinctrl_fsi1_default>; 772 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 773 status = "disabled"; 774 }; 775 776 fsim1: fsi@1e79b100 { 777 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 778 reg = <0x1e79b100 0x94>; 779 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 780 pinctrl-names = "default"; 781 pinctrl-0 = <&pinctrl_fsi2_default>; 782 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 783 status = "disabled"; 784 }; 785 }; 786 }; 787 }; 788 789 #include "aspeed-g6-pinctrl.dtsi" 790 791 &i2c { 792 i2c0: i2c-bus@80 { 793 #address-cells = <1>; 794 #size-cells = <0>; 795 #interrupt-cells = <1>; 796 reg = <0x80 0x80>; 797 compatible = "aspeed,ast2600-i2c-bus"; 798 clocks = <&syscon ASPEED_CLK_APB2>; 799 resets = <&syscon ASPEED_RESET_I2C>; 800 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 801 bus-frequency = <100000>; 802 pinctrl-names = "default"; 803 pinctrl-0 = <&pinctrl_i2c1_default>; 804 status = "disabled"; 805 }; 806 807 i2c1: i2c-bus@100 { 808 #address-cells = <1>; 809 #size-cells = <0>; 810 #interrupt-cells = <1>; 811 reg = <0x100 0x80>; 812 compatible = "aspeed,ast2600-i2c-bus"; 813 clocks = <&syscon ASPEED_CLK_APB2>; 814 resets = <&syscon ASPEED_RESET_I2C>; 815 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 816 bus-frequency = <100000>; 817 pinctrl-names = "default"; 818 pinctrl-0 = <&pinctrl_i2c2_default>; 819 status = "disabled"; 820 }; 821 822 i2c2: i2c-bus@180 { 823 #address-cells = <1>; 824 #size-cells = <0>; 825 #interrupt-cells = <1>; 826 reg = <0x180 0x80>; 827 compatible = "aspeed,ast2600-i2c-bus"; 828 clocks = <&syscon ASPEED_CLK_APB2>; 829 resets = <&syscon ASPEED_RESET_I2C>; 830 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 831 bus-frequency = <100000>; 832 pinctrl-names = "default"; 833 pinctrl-0 = <&pinctrl_i2c3_default>; 834 status = "disabled"; 835 }; 836 837 i2c3: i2c-bus@200 { 838 #address-cells = <1>; 839 #size-cells = <0>; 840 #interrupt-cells = <1>; 841 reg = <0x200 0x80>; 842 compatible = "aspeed,ast2600-i2c-bus"; 843 clocks = <&syscon ASPEED_CLK_APB2>; 844 resets = <&syscon ASPEED_RESET_I2C>; 845 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 846 bus-frequency = <100000>; 847 pinctrl-names = "default"; 848 pinctrl-0 = <&pinctrl_i2c4_default>; 849 status = "disabled"; 850 }; 851 852 i2c4: i2c-bus@280 { 853 #address-cells = <1>; 854 #size-cells = <0>; 855 #interrupt-cells = <1>; 856 reg = <0x280 0x80>; 857 compatible = "aspeed,ast2600-i2c-bus"; 858 clocks = <&syscon ASPEED_CLK_APB2>; 859 resets = <&syscon ASPEED_RESET_I2C>; 860 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 861 bus-frequency = <100000>; 862 pinctrl-names = "default"; 863 pinctrl-0 = <&pinctrl_i2c5_default>; 864 status = "disabled"; 865 }; 866 867 i2c5: i2c-bus@300 { 868 #address-cells = <1>; 869 #size-cells = <0>; 870 #interrupt-cells = <1>; 871 reg = <0x300 0x80>; 872 compatible = "aspeed,ast2600-i2c-bus"; 873 clocks = <&syscon ASPEED_CLK_APB2>; 874 resets = <&syscon ASPEED_RESET_I2C>; 875 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 876 bus-frequency = <100000>; 877 pinctrl-names = "default"; 878 pinctrl-0 = <&pinctrl_i2c6_default>; 879 status = "disabled"; 880 }; 881 882 i2c6: i2c-bus@380 { 883 #address-cells = <1>; 884 #size-cells = <0>; 885 #interrupt-cells = <1>; 886 reg = <0x380 0x80>; 887 compatible = "aspeed,ast2600-i2c-bus"; 888 clocks = <&syscon ASPEED_CLK_APB2>; 889 resets = <&syscon ASPEED_RESET_I2C>; 890 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 891 bus-frequency = <100000>; 892 pinctrl-names = "default"; 893 pinctrl-0 = <&pinctrl_i2c7_default>; 894 status = "disabled"; 895 }; 896 897 i2c7: i2c-bus@400 { 898 #address-cells = <1>; 899 #size-cells = <0>; 900 #interrupt-cells = <1>; 901 reg = <0x400 0x80>; 902 compatible = "aspeed,ast2600-i2c-bus"; 903 clocks = <&syscon ASPEED_CLK_APB2>; 904 resets = <&syscon ASPEED_RESET_I2C>; 905 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 906 bus-frequency = <100000>; 907 pinctrl-names = "default"; 908 pinctrl-0 = <&pinctrl_i2c8_default>; 909 status = "disabled"; 910 }; 911 912 i2c8: i2c-bus@480 { 913 #address-cells = <1>; 914 #size-cells = <0>; 915 #interrupt-cells = <1>; 916 reg = <0x480 0x80>; 917 compatible = "aspeed,ast2600-i2c-bus"; 918 clocks = <&syscon ASPEED_CLK_APB2>; 919 resets = <&syscon ASPEED_RESET_I2C>; 920 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 921 bus-frequency = <100000>; 922 pinctrl-names = "default"; 923 pinctrl-0 = <&pinctrl_i2c9_default>; 924 status = "disabled"; 925 }; 926 927 i2c9: i2c-bus@500 { 928 #address-cells = <1>; 929 #size-cells = <0>; 930 #interrupt-cells = <1>; 931 reg = <0x500 0x80>; 932 compatible = "aspeed,ast2600-i2c-bus"; 933 clocks = <&syscon ASPEED_CLK_APB2>; 934 resets = <&syscon ASPEED_RESET_I2C>; 935 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 936 bus-frequency = <100000>; 937 pinctrl-names = "default"; 938 pinctrl-0 = <&pinctrl_i2c10_default>; 939 status = "disabled"; 940 }; 941 942 i2c10: i2c-bus@580 { 943 #address-cells = <1>; 944 #size-cells = <0>; 945 #interrupt-cells = <1>; 946 reg = <0x580 0x80>; 947 compatible = "aspeed,ast2600-i2c-bus"; 948 clocks = <&syscon ASPEED_CLK_APB2>; 949 resets = <&syscon ASPEED_RESET_I2C>; 950 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 951 bus-frequency = <100000>; 952 pinctrl-names = "default"; 953 pinctrl-0 = <&pinctrl_i2c11_default>; 954 status = "disabled"; 955 }; 956 957 i2c11: i2c-bus@600 { 958 #address-cells = <1>; 959 #size-cells = <0>; 960 #interrupt-cells = <1>; 961 reg = <0x600 0x80>; 962 compatible = "aspeed,ast2600-i2c-bus"; 963 clocks = <&syscon ASPEED_CLK_APB2>; 964 resets = <&syscon ASPEED_RESET_I2C>; 965 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 966 bus-frequency = <100000>; 967 pinctrl-names = "default"; 968 pinctrl-0 = <&pinctrl_i2c12_default>; 969 status = "disabled"; 970 }; 971 972 i2c12: i2c-bus@680 { 973 #address-cells = <1>; 974 #size-cells = <0>; 975 #interrupt-cells = <1>; 976 reg = <0x680 0x80>; 977 compatible = "aspeed,ast2600-i2c-bus"; 978 clocks = <&syscon ASPEED_CLK_APB2>; 979 resets = <&syscon ASPEED_RESET_I2C>; 980 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 981 bus-frequency = <100000>; 982 pinctrl-names = "default"; 983 pinctrl-0 = <&pinctrl_i2c13_default>; 984 status = "disabled"; 985 }; 986 987 i2c13: i2c-bus@700 { 988 #address-cells = <1>; 989 #size-cells = <0>; 990 #interrupt-cells = <1>; 991 reg = <0x700 0x80>; 992 compatible = "aspeed,ast2600-i2c-bus"; 993 clocks = <&syscon ASPEED_CLK_APB2>; 994 resets = <&syscon ASPEED_RESET_I2C>; 995 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 996 bus-frequency = <100000>; 997 pinctrl-names = "default"; 998 pinctrl-0 = <&pinctrl_i2c14_default>; 999 status = "disabled"; 1000 }; 1001 1002 i2c14: i2c-bus@780 { 1003 #address-cells = <1>; 1004 #size-cells = <0>; 1005 #interrupt-cells = <1>; 1006 reg = <0x780 0x80>; 1007 compatible = "aspeed,ast2600-i2c-bus"; 1008 clocks = <&syscon ASPEED_CLK_APB2>; 1009 resets = <&syscon ASPEED_RESET_I2C>; 1010 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; 1011 bus-frequency = <100000>; 1012 pinctrl-names = "default"; 1013 pinctrl-0 = <&pinctrl_i2c15_default>; 1014 status = "disabled"; 1015 }; 1016 1017 i2c15: i2c-bus@800 { 1018 #address-cells = <1>; 1019 #size-cells = <0>; 1020 #interrupt-cells = <1>; 1021 reg = <0x800 0x80>; 1022 compatible = "aspeed,ast2600-i2c-bus"; 1023 clocks = <&syscon ASPEED_CLK_APB2>; 1024 resets = <&syscon ASPEED_RESET_I2C>; 1025 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 1026 bus-frequency = <100000>; 1027 pinctrl-names = "default"; 1028 pinctrl-0 = <&pinctrl_i2c16_default>; 1029 status = "disabled"; 1030 }; 1031 };
Cache object: e84e2468dcf3f26c99026f9c29f60013
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