The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/at91-sama5d27_som1.dtsi

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    1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
    2 /*
    3  * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
    4  *
    5  *  Copyright (c) 2017, Microchip Technology Inc.
    6  *                2017 Cristian Birsan <cristian.birsan@microchip.com>
    7  *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
    8  */
    9 #include "sama5d2.dtsi"
   10 #include "sama5d2-pinfunc.h"
   11 #include <dt-bindings/gpio/gpio.h>
   12 
   13 / {
   14         model = "Atmel SAMA5D27 SoM1";
   15         compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
   16 
   17         aliases {
   18                 i2c0 = &i2c0;
   19         };
   20 
   21         clocks {
   22                 slow_xtal {
   23                         clock-frequency = <32768>;
   24                 };
   25 
   26                 main_xtal {
   27                         clock-frequency = <24000000>;
   28                 };
   29         };
   30 
   31         ahb {
   32                 sdmmc0: sdio-host@a0000000 {
   33                         microchip,sdcal-inverted;
   34                 };
   35 
   36                 apb {
   37                         qspi1: spi@f0024000 {
   38                                 pinctrl-names = "default";
   39                                 pinctrl-0 = <&pinctrl_qspi1_default>;
   40 
   41                                 flash@0 {
   42                                         #address-cells = <1>;
   43                                         #size-cells = <1>;
   44                                         compatible = "jedec,spi-nor";
   45                                         reg = <0>;
   46                                         spi-max-frequency = <80000000>;
   47                                         spi-tx-bus-width = <4>;
   48                                         spi-rx-bus-width = <4>;
   49                                         m25p,fast-read;
   50 
   51                                         at91bootstrap@0 {
   52                                                 label = "at91bootstrap";
   53                                                 reg = <0x00000000 0x00040000>;
   54                                         };
   55 
   56                                         bootloader@40000 {
   57                                                 label = "bootloader";
   58                                                 reg = <0x00040000 0x000c0000>;
   59                                         };
   60 
   61                                         bootloaderenvred@100000 {
   62                                                 label = "bootloader env redundant";
   63                                                 reg = <0x00100000 0x00040000>;
   64                                         };
   65 
   66                                         bootloaderenv@140000 {
   67                                                 label = "bootloader env";
   68                                                 reg = <0x00140000 0x00040000>;
   69                                         };
   70 
   71                                         dtb@180000 {
   72                                                 label = "device tree";
   73                                                 reg = <0x00180000 0x00080000>;
   74                                         };
   75 
   76                                         kernel@200000 {
   77                                                 label = "kernel";
   78                                                 reg = <0x00200000 0x00600000>;
   79                                         };
   80                                 };
   81                         };
   82 
   83                         macb0: ethernet@f8008000 {
   84                                 pinctrl-names = "default";
   85                                 pinctrl-0 = <&pinctrl_macb0_default>;
   86                                 #address-cells = <1>;
   87                                 #size-cells = <0>;
   88                                 phy-mode = "rmii";
   89 
   90                                 ethernet-phy@7 {
   91                                         reg = <0x7>;
   92                                         interrupt-parent = <&pioA>;
   93                                         interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
   94                                         pinctrl-names = "default";
   95                                         pinctrl-0 = <&pinctrl_macb0_phy_irq>;
   96                                 };
   97                         };
   98 
   99                         i2c0: i2c@f8028000 {
  100                                 dmas = <0>, <0>;
  101                                 pinctrl-names = "default", "gpio";
  102                                 pinctrl-0 = <&pinctrl_i2c0_default>;
  103                                 pinctrl-1 = <&pinctrl_i2c0_gpio>;
  104                                 sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
  105                                 scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  106                                 status = "okay";
  107 
  108                                 at24@50 {
  109                                         compatible = "atmel,24c02";
  110                                         reg = <0x50>;
  111                                         pagesize = <8>;
  112                                 };
  113                         };
  114 
  115                         pinctrl@fc038000 {
  116                                 pinctrl_i2c0_default: i2c0_default {
  117                                         pinmux = <PIN_PD21__TWD0>,
  118                                                  <PIN_PD22__TWCK0>;
  119                                         bias-disable;
  120                                 };
  121 
  122                                 pinctrl_i2c0_gpio: i2c0_gpio {
  123                                         pinmux = <PIN_PD21__GPIO>,
  124                                                  <PIN_PD22__GPIO>;
  125                                         bias-disable;
  126                                 };
  127 
  128                                 pinctrl_qspi1_default: qspi1_default {
  129                                         sck_cs {
  130                                                 pinmux = <PIN_PB5__QSPI1_SCK>,
  131                                                          <PIN_PB6__QSPI1_CS>;
  132                                                 bias-disable;
  133                                         };
  134 
  135                                         data {
  136                                                 pinmux = <PIN_PB7__QSPI1_IO0>,
  137                                                          <PIN_PB8__QSPI1_IO1>,
  138                                                          <PIN_PB9__QSPI1_IO2>,
  139                                                          <PIN_PB10__QSPI1_IO3>;
  140                                                 bias-pull-up;
  141                                         };
  142                                 };
  143 
  144                                 pinctrl_macb0_default: macb0_default {
  145                                         pinmux = <PIN_PD9__GTXCK>,
  146                                                  <PIN_PD10__GTXEN>,
  147                                                  <PIN_PD11__GRXDV>,
  148                                                  <PIN_PD12__GRXER>,
  149                                                  <PIN_PD13__GRX0>,
  150                                                  <PIN_PD14__GRX1>,
  151                                                  <PIN_PD15__GTX0>,
  152                                                  <PIN_PD16__GTX1>,
  153                                                  <PIN_PD17__GMDC>,
  154                                                  <PIN_PD18__GMDIO>;
  155                                         bias-disable;
  156                                 };
  157 
  158                                 pinctrl_macb0_phy_irq: macb0_phy_irq {
  159                                         pinmux = <PIN_PD31__GPIO>;
  160                                         bias-disable;
  161                                 };
  162                         };
  163                 };
  164         };
  165 };

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