da850-lcdk.dts

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
    1 // SPDX-License-Identifier: GPL-2.0-only
    2 /*
    3  * Copyright (c) 2016 BayLibre, Inc.
    4  */
    5 /dts-v1/;
    6 #include "da850.dtsi"
    7 #include <dt-bindings/gpio/gpio.h>
    8 #include <dt-bindings/input/input.h>
    9 
   10 / {
   11         model = "DA850/AM1808/OMAP-L138 LCDK";
   12         compatible = "ti,da850-lcdk", "ti,da850";
   13 
   14         aliases {
   15                 serial2 = &serial2;
   16                 ethernet0 = &eth0;
   17         };
   18 
   19         chosen {
   20                 stdout-path = "serial2:115200n8";
   21         };
   22 
   23         memory@c0000000 {
   24                 /* 128 MB DDR2 SDRAM @ 0xc0000000 */
   25                 reg = <0xc0000000 0x08000000>;
   26         };
   27 
   28         reserved-memory {
   29                 #address-cells = <1>;
   30                 #size-cells = <1>;
   31                 ranges;
   32 
   33                 dsp_memory_region: dsp-memory@c3000000 {
   34                         compatible = "shared-dma-pool";
   35                         reg = <0xc3000000 0x1000000>;
   36                         reusable;
   37                         status = "okay";
   38                 };
   39         };
   40 
   41         vcc_5vd: fixedregulator-vcc_5vd {
   42                 compatible = "regulator-fixed";
   43                 regulator-name = "vcc_5vd";
   44                 regulator-min-microvolt = <5000000>;
   45                 regulator-max-microvolt = <5000000>;
   46                 regulator-boot-on;
   47         };
   48 
   49         vcc_3v3d: fixedregulator-vcc_3v3d {
   50                 /* TPS650250 - VDCDC1 */
   51                 compatible = "regulator-fixed";
   52                 regulator-name = "vcc_3v3d";
   53                 regulator-min-microvolt = <3300000>;
   54                 regulator-max-microvolt = <3300000>;
   55                 vin-supply = <&vcc_5vd>;
   56                 regulator-always-on;
   57                 regulator-boot-on;
   58         };
   59 
   60         vcc_1v8d: fixedregulator-vcc_1v8d {
   61                 /* TPS650250 - VDCDC2 */
   62                 compatible = "regulator-fixed";
   63                 regulator-name = "vcc_1v8d";
   64                 regulator-min-microvolt = <1800000>;
   65                 regulator-max-microvolt = <1800000>;
   66                 vin-supply = <&vcc_5vd>;
   67                 regulator-always-on;
   68                 regulator-boot-on;
   69         };
   70 
   71         sound {
   72                 compatible = "simple-audio-card";
   73                 simple-audio-card,name = "DA850-OMAPL138 LCDK";
   74                 simple-audio-card,widgets =
   75                         "Line", "Line In",
   76                         "Line", "Line Out",
   77                         "Microphone", "Mic Jack";
   78                 simple-audio-card,routing =
   79                         "LINE1L", "Line In",
   80                         "LINE1R", "Line In",
   81                         "Line Out", "LLOUT",
   82                         "Line Out", "RLOUT",
   83                         "MIC3L", "Mic Jack",
   84                         "MIC3R", "Mic Jack",
   85                         "Mic Jack", "Mic Bias";
   86                 simple-audio-card,format = "dsp_b";
   87                 simple-audio-card,bitclock-master = <&link0_codec>;
   88                 simple-audio-card,frame-master = <&link0_codec>;
   89                 simple-audio-card,bitclock-inversion;
   90 
   91                 simple-audio-card,cpu {
   92                         sound-dai = <&mcasp0>;
   93                         system-clock-frequency = <24576000>;
   94                 };
   95 
   96                 link0_codec: simple-audio-card,codec {
   97                         sound-dai = <&tlv320aic3106>;
   98                         system-clock-frequency = <24576000>;
   99                 };
  100         };
  101 
  102         gpio-keys {
  103                 compatible = "gpio-keys";
  104                 autorepeat;
  105 
  106                 user1 {
  107                         label = "GPIO Key USER1";
  108                         linux,code = <BTN_0>;
  109                         gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
  110                 };
  111 
  112                 user2 {
  113                         label = "GPIO Key USER2";
  114                         linux,code = <BTN_1>;
  115                         gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
  116                 };
  117         };
  118 
  119         vga-bridge {
  120                 compatible = "ti,ths8135";
  121                 #address-cells = <1>;
  122                 #size-cells = <0>;
  123 
  124                 ports {
  125                         #address-cells = <1>;
  126                         #size-cells = <0>;
  127 
  128                         port@0 {
  129                                 reg = <0>;
  130 
  131                                 vga_bridge_in: endpoint {
  132                                         remote-endpoint = <&lcdc_out_vga>;
  133                                 };
  134                         };
  135 
  136                         port@1 {
  137                                 reg = <1>;
  138 
  139                                 vga_bridge_out: endpoint {
  140                                         remote-endpoint = <&vga_con_in>;
  141                                 };
  142                         };
  143                 };
  144         };
  145 
  146         vga {
  147                 compatible = "vga-connector";
  148 
  149                 ddc-i2c-bus = <&i2c0>;
  150 
  151                 port {
  152                         vga_con_in: endpoint {
  153                                 remote-endpoint = <&vga_bridge_out>;
  154                         };
  155                 };
  156         };
  157 
  158         cvdd: regulator0 {
  159                 compatible = "regulator-fixed";
  160                 regulator-name = "cvdd";
  161                 regulator-min-microvolt = <1300000>;
  162                 regulator-max-microvolt = <1300000>;
  163                 regulator-always-on;
  164                 regulator-boot-on;
  165         };
  166 };
  167 
  168 &ref_clk {
  169         clock-frequency = <24000000>;
  170 };
  171 
  172 &cpu {
  173         cpu-supply = <&cvdd>;
  174 };
  175 
  176 /*
  177  * LCDK has a fixed CVDD of 1.3V, so only operating points >= 300MHz are
  178  * valid. Unfortunately due to a problem with the DA8XX OHCI controller, we
  179  * can't enable more than one OPP by default, since the controller sometimes
  180  * becomes unresponsive after a transition. Fix the frequency at 456 MHz.
  181  */
  182 
  183 &opp_100 {
  184         status = "disabled";
  185 };
  186 
  187 &opp_200 {
  188         status = "disabled";
  189 };
  190 
  191 &opp_300 {
  192         status = "disabled";
  193 };
  194 
  195 &opp_456 {
  196         status = "okay";
  197 };
  198 
  199 &pmx_core {
  200         status = "okay";
  201 
  202         mcasp0_pins: pinmux_mcasp0_pins {
  203                 pinctrl-single,bits = <
  204                         /* AHCLKX AFSX ACLKX */
  205                         0x00 0x00101010 0x00f0f0f0
  206                         /* ARX13 ARX14 */
  207                         0x04 0x00000110 0x00000ff0
  208                 >;
  209         };
  210 
  211         nand_pins: nand_pins {
  212                 pinctrl-single,bits = <
  213                         /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
  214                         0x1c 0x10110010  0xf0ff00f0
  215                         /*
  216                          * EMA_D[0], EMA_D[1], EMA_D[2],
  217                          * EMA_D[3], EMA_D[4], EMA_D[5],
  218                          * EMA_D[6], EMA_D[7]
  219                          */
  220                         0x24 0x11111111  0xffffffff
  221                         /*
  222                          * EMA_D[8],  EMA_D[9],  EMA_D[10],
  223                          * EMA_D[11], EMA_D[12], EMA_D[13],
  224                          * EMA_D[14], EMA_D[15]
  225                          */
  226                         0x20 0x11111111  0xffffffff
  227                         /* EMA_A[1], EMA_A[2] */
  228                         0x30 0x01100000  0x0ff00000
  229                 >;
  230         };
  231 };
  232 
  233 &serial2 {
  234         pinctrl-names = "default";
  235         pinctrl-0 = <&serial2_rxtx_pins>;
  236         status = "okay";
  237 };
  238 
  239 &wdt {
  240         status = "okay";
  241 };
  242 
  243 &rtc0 {
  244         status = "okay";
  245 };
  246 
  247 &gpio {
  248         status = "okay";
  249 };
  250 
  251 &sata_refclk {
  252         status = "okay";
  253         clock-frequency = <100000000>;
  254 };
  255 
  256 &sata {
  257         status = "okay";
  258 };
  259 
  260 &mdio {
  261         pinctrl-names = "default";
  262         pinctrl-0 = <&mdio_pins>;
  263         bus_freq = <2200000>;
  264         status = "okay";
  265 };
  266 
  267 &eth0 {
  268         pinctrl-names = "default";
  269         pinctrl-0 = <&mii_pins>;
  270         status = "okay";
  271 };
  272 
  273 &mmc0 {
  274         max-frequency = <50000000>;
  275         bus-width = <4>;
  276         pinctrl-names = "default";
  277         pinctrl-0 = <&mmc0_pins>;
  278         cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>;
  279         status = "okay";
  280 };
  281 
  282 &i2c0 {
  283         pinctrl-names = "default";
  284         pinctrl-0 = <&i2c0_pins>;
  285         clock-frequency = <100000>;
  286         status = "okay";
  287 
  288         tlv320aic3106: tlv320aic3106@18 {
  289                 #sound-dai-cells = <0>;
  290                 compatible = "ti,tlv320aic3106";
  291                 reg = <0x18>;
  292                 adc-settle-ms = <40>;
  293                 ai3x-micbias-vg = <1>;          /* 2.0V */
  294                 status = "okay";
  295 
  296                 /* Regulators */
  297                 IOVDD-supply = <&vcc_3v3d>;
  298                 AVDD-supply = <&vcc_3v3d>;
  299                 DRVDD-supply = <&vcc_3v3d>;
  300                 DVDD-supply = <&vcc_1v8d>;
  301         };
  302 };
  303 
  304 &mcasp0 {
  305         #sound-dai-cells = <0>;
  306         pinctrl-names = "default";
  307         pinctrl-0 = <&mcasp0_pins>;
  308         status = "okay";
  309 
  310         op-mode = <0>;   /* DAVINCI_MCASP_IIS_MODE */
  311         tdm-slots = <2>;
  312         serial-dir = <   /* 0: INACTIVE, 1: TX, 2: RX */
  313                 0 0 0 0
  314                 0 0 0 0
  315                 0 0 0 0
  316                 0 1 2 0
  317         >;
  318         tx-num-evt = <32>;
  319         rx-num-evt = <32>;
  320 };
  321 
  322 &usb_phy {
  323         status = "okay";
  324 };
  325 
  326 &usb0 {
  327         status = "okay";
  328 };
  329 
  330 &usb1 {
  331         status = "okay";
  332 };
  333 
  334 &aemif {
  335         pinctrl-names = "default";
  336         pinctrl-0 = <&nand_pins>;
  337         status = "okay";
  338         cs3 {
  339                 #address-cells = <2>;
  340                 #size-cells = <1>;
  341                 clock-ranges;
  342                 ranges;
  343 
  344                 ti,cs-chipselect = <3>;
  345 
  346                 nand@2000000,0 {
  347                         compatible = "ti,davinci-nand";
  348                         #address-cells = <1>;
  349                         #size-cells = <1>;
  350                         reg = <0 0x02000000 0x02000000
  351                                1 0x00000000 0x00008000>;
  352 
  353                         ti,davinci-chipselect = <1>;
  354                         ti,davinci-mask-ale = <0>;
  355                         ti,davinci-mask-cle = <0>;
  356                         ti,davinci-mask-chipsel = <0>;
  357 
  358                         ti,davinci-nand-buswidth = <16>;
  359                         ti,davinci-ecc-mode = "hw";
  360                         ti,davinci-ecc-bits = <4>;
  361                         ti,davinci-nand-use-bbt;
  362 
  363                         /*
  364                          * The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
  365                          * "To boot from NAND Flash, the AIS should be written
  366                          * to NAND block 1 (NAND block 0 is not used by default)".
  367                          * The same doc mentions that for ROM "Silicon Revision 2.1",
  368                          * "Updated NAND boot mode to offer boot from block 0 or block 1".
  369                          * However the limitaion is left here by default for compatibility
  370                          * with older silicon and because it needs new boot pin settings
  371                          * not possible in stock LCDK.
  372                          */
  373                         partitions {
  374                                 compatible = "fixed-partitions";
  375                                 #address-cells = <1>;
  376                                 #size-cells = <1>;
  377 
  378                                 partition@0 {
  379                                         label = "u-boot env";
  380                                         reg = <0 0x020000>;
  381                                 };
  382                                 partition@20000 {
  383                                         /* The LCDK defaults to booting from this partition */
  384                                         label = "u-boot";
  385                                         reg = <0x020000 0x080000>;
  386                                 };
  387                                 partition@a0000 {
  388                                         label = "free space";
  389                                         reg = <0x0a0000 0>;
  390                                 };
  391                         };
  392                 };
  393         };
  394 };
  395 
  396 &prictrl {
  397         status = "okay";
  398 };
  399 
  400 &memctrl {
  401         status = "okay";
  402 };
  403 
  404 &lcdc {
  405         status = "okay";
  406         pinctrl-names = "default";
  407         pinctrl-0 = <&lcd_pins>;
  408 
  409         port {
  410                 lcdc_out_vga: endpoint {
  411                         remote-endpoint = <&vga_bridge_in>;
  412                 };
  413         };
  414 };
  415 
  416 &vpif {
  417         pinctrl-names = "default";
  418         pinctrl-0 = <&vpif_capture_pins>;
  419         status = "okay";
  420 };
  421 
  422 &dsp {
  423         memory-region = <&dsp_memory_region>;
  424         status = "okay";
  425 };
Cache object: 9d662b2a906f1706997032eda5c4ff78
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.
FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm/da850-lcdk.dts

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/da850-lcdk.dts
