Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/dra71-evm.dts
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ 4 */ 5 6 #include "dra71x.dtsi" 7 #include "dra7-mmc-iodelay.dtsi" 8 #include "dra72x-mmc-iodelay.dtsi" 9 #include <dt-bindings/net/ti-dp83867.h> 10 11 / { 12 compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7"; 13 model = "TI DRA718 EVM"; 14 15 memory { 16 device_type = "memory"; 17 reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */ 18 }; 19 20 reserved-memory { 21 #address-cells = <2>; 22 #size-cells = <2>; 23 ranges; 24 25 ipu2_memory_region: ipu2-memory@95800000 { 26 compatible = "shared-dma-pool"; 27 reg = <0x0 0x95800000 0x0 0x3800000>; 28 reusable; 29 status = "okay"; 30 }; 31 32 dsp1_memory_region: dsp1-memory@99000000 { 33 compatible = "shared-dma-pool"; 34 reg = <0x0 0x99000000 0x0 0x4000000>; 35 reusable; 36 status = "okay"; 37 }; 38 39 ipu1_memory_region: ipu1-memory@9d000000 { 40 compatible = "shared-dma-pool"; 41 reg = <0x0 0x9d000000 0x0 0x2000000>; 42 reusable; 43 status = "okay"; 44 }; 45 }; 46 47 vpo_sd_1v8_3v3: gpio-regulator-TPS74801 { 48 compatible = "regulator-gpio"; 49 50 regulator-name = "vddshv8"; 51 regulator-min-microvolt = <1800000>; 52 regulator-max-microvolt = <3300000>; 53 regulator-boot-on; 54 vin-supply = <&evm_5v0>; 55 56 gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; 57 states = <1800000 0x0 58 3300000 0x1>; 59 }; 60 61 evm_1v8_sw: fixedregulator-evm_1v8 { 62 compatible = "regulator-fixed"; 63 regulator-name = "evm_1v8"; 64 regulator-min-microvolt = <1800000>; 65 regulator-max-microvolt = <1800000>; 66 vin-supply = <&lp8732_buck0_reg>; 67 regulator-always-on; 68 regulator-boot-on; 69 }; 70 71 poweroff: gpio-poweroff { 72 compatible = "gpio-poweroff"; 73 gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>; 74 input; 75 }; 76 }; 77 78 &i2c1 { 79 status = "okay"; 80 clock-frequency = <400000>; 81 82 lp8733: lp8733@60 { 83 compatible = "ti,lp8733"; 84 reg = <0x60>; 85 86 buck0-in-supply =<&vsys_3v3>; 87 buck1-in-supply =<&vsys_3v3>; 88 ldo0-in-supply =<&evm_5v0>; 89 ldo1-in-supply =<&evm_5v0>; 90 91 lp8733_regulators: regulators { 92 lp8733_buck0_reg: buck0 { 93 /* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */ 94 regulator-name = "lp8733-buck0"; 95 regulator-min-microvolt = <850000>; 96 regulator-max-microvolt = <1250000>; 97 regulator-always-on; 98 regulator-boot-on; 99 }; 100 101 lp8733_buck1_reg: buck1 { 102 /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */ 103 regulator-name = "lp8733-buck1"; 104 regulator-min-microvolt = <850000>; 105 regulator-max-microvolt = <1250000>; 106 regulator-boot-on; 107 regulator-always-on; 108 }; 109 110 lp8733_ldo0_reg: ldo0 { 111 /* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */ 112 regulator-name = "lp8733-ldo0"; 113 regulator-min-microvolt = <3300000>; 114 regulator-max-microvolt = <3300000>; 115 regulator-boot-on; 116 regulator-always-on; 117 }; 118 119 lp8733_ldo1_reg: ldo1 { 120 /* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */ 121 regulator-name = "lp8733-ldo1"; 122 regulator-min-microvolt = <3300000>; 123 regulator-max-microvolt = <3300000>; 124 regulator-always-on; 125 regulator-boot-on; 126 }; 127 }; 128 }; 129 130 lp8732: lp8732@61 { 131 compatible = "ti,lp8732"; 132 reg = <0x61>; 133 134 buck0-in-supply =<&vsys_3v3>; 135 buck1-in-supply =<&vsys_3v3>; 136 ldo0-in-supply =<&vsys_3v3>; 137 ldo1-in-supply =<&vsys_3v3>; 138 139 lp8732_regulators: regulators { 140 lp8732_buck0_reg: buck0 { 141 /* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */ 142 regulator-name = "lp8732-buck0"; 143 regulator-min-microvolt = <1800000>; 144 regulator-max-microvolt = <1800000>; 145 regulator-always-on; 146 regulator-boot-on; 147 }; 148 149 lp8732_buck1_reg: buck1 { 150 /* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */ 151 regulator-name = "lp8732-buck1"; 152 regulator-min-microvolt = <1350000>; 153 regulator-max-microvolt = <1350000>; 154 regulator-boot-on; 155 regulator-always-on; 156 }; 157 158 lp8732_ldo0_reg: ldo0 { 159 /* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */ 160 regulator-name = "lp8732-ldo0"; 161 regulator-min-microvolt = <1800000>; 162 regulator-max-microvolt = <1800000>; 163 regulator-boot-on; 164 regulator-always-on; 165 }; 166 167 lp8732_ldo1_reg: ldo1 { 168 /* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */ 169 regulator-name = "lp8732-ldo1"; 170 regulator-min-microvolt = <1800000>; 171 regulator-max-microvolt = <1800000>; 172 regulator-always-on; 173 regulator-boot-on; 174 }; 175 }; 176 }; 177 }; 178 179 &pcf_lcd { 180 interrupt-parent = <&gpio7>; 181 interrupts = <31 IRQ_TYPE_EDGE_FALLING>; 182 }; 183 184 &pcf_gpio_21 { 185 interrupt-parent = <&gpio7>; 186 interrupts = <31 IRQ_TYPE_EDGE_FALLING>; 187 }; 188 189 &pcf_hdmi { 190 hdmi-i2c-disable-hog { 191 /* 192 * PM_OEn to High: Disable routing I2C3 to PM_I2C 193 * With this PM_SEL(p3) should not matter 194 */ 195 gpio-hog; 196 gpios = <0 GPIO_ACTIVE_LOW>; 197 output-high; 198 line-name = "pm_oe_n"; 199 }; 200 }; 201 202 &mmc1 { 203 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; 204 pinctrl-0 = <&mmc1_pins_default_no_clk_pu>; 205 pinctrl-1 = <&mmc1_pins_hs>; 206 pinctrl-2 = <&mmc1_pins_sdr12>; 207 pinctrl-3 = <&mmc1_pins_sdr25>; 208 pinctrl-4 = <&mmc1_pins_sdr50>; 209 pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>; 210 pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; 211 vqmmc-supply = <&vpo_sd_1v8_3v3>; 212 }; 213 214 &mmc2 { 215 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; 216 pinctrl-0 = <&mmc2_pins_default>; 217 pinctrl-1 = <&mmc2_pins_hs>; 218 pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>; 219 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>; 220 vmmc-supply = <&evm_1v8_sw>; 221 vqmmc-supply = <&evm_1v8_sw>; 222 }; 223 224 &mac_sw { 225 mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>, 226 <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */ 227 <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */ 228 status = "okay"; 229 }; 230 231 &cpsw_port1 { 232 phy-handle = <&dp83867_0>; 233 phy-mode = "rgmii-id"; 234 ti,dual-emac-pvid = <1>; 235 }; 236 237 &cpsw_port2 { 238 phy-handle = <&dp83867_1>; 239 phy-mode = "rgmii-id"; 240 ti,dual-emac-pvid = <2>; 241 }; 242 243 &davinci_mdio_sw { 244 dp83867_0: ethernet-phy@2 { 245 reg = <2>; 246 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 247 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 248 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 249 ti,min-output-impedance; 250 ti,dp83867-rxctrl-strap-quirk; 251 }; 252 253 dp83867_1: ethernet-phy@3 { 254 reg = <3>; 255 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 256 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 257 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 258 ti,min-output-impedance; 259 ti,dp83867-rxctrl-strap-quirk; 260 }; 261 }; 262 263 /* No Sata on this device */ 264 &sata_phy { 265 status = "disabled"; 266 }; 267 268 &sata { 269 status = "disabled"; 270 }; 271 272 /* No RTC on this device */ 273 &rtc { 274 status = "disabled"; 275 }; 276 277 &usb2_phy1 { 278 phy-supply = <&lp8733_ldo1_reg>; 279 }; 280 281 &usb2_phy2 { 282 phy-supply = <&lp8733_ldo1_reg>; 283 }; 284 285 &dss { 286 /* Supplied by VDA_1V8_PLL */ 287 vdda_video-supply = <&lp8732_ldo0_reg>; 288 }; 289 290 &hdmi { 291 /* Supplied by VDA_1V8_PHY */ 292 vdda_video-supply = <&lp8732_ldo1_reg>; 293 }; 294 295 &extcon_usb1 { 296 vbus-gpio = <&pcf_lcd 14 GPIO_ACTIVE_HIGH>; 297 }; 298 299 &extcon_usb2 { 300 vbus-gpio = <&pcf_lcd 15 GPIO_ACTIVE_HIGH>; 301 }; 302 303 &ipu2 { 304 status = "okay"; 305 memory-region = <&ipu2_memory_region>; 306 }; 307 308 &ipu1 { 309 status = "okay"; 310 memory-region = <&ipu1_memory_region>; 311 }; 312 313 &dsp1 { 314 status = "okay"; 315 memory-region = <&dsp1_memory_region>; 316 };
Cache object: 9749b471c26fa0bee5afad7b10b95f00
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]