Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/contrib/device-tree/src/arm/imx23.dtsi
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1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // Copyright 2012 Freescale Semiconductor, Inc. 4 5 #include "imx23-pinfunc.h" 6 7 / { 8 #address-cells = <1>; 9 #size-cells = <1>; 10 11 interrupt-parent = <&icoll>; 12 /* 13 * The decompressor and also some bootloaders rely on a 14 * pre-existing /chosen node to be available to insert the 15 * command line and merge other ATAGS info. 16 */ 17 chosen {}; 18 19 aliases { 20 gpio0 = &gpio0; 21 gpio1 = &gpio1; 22 gpio2 = &gpio2; 23 serial0 = &auart0; 24 serial1 = &auart1; 25 spi0 = &ssp0; 26 spi1 = &ssp1; 27 usbphy0 = &usbphy0; 28 }; 29 30 cpus { 31 #address-cells = <1>; 32 #size-cells = <0>; 33 34 cpu@0 { 35 compatible = "arm,arm926ej-s"; 36 device_type = "cpu"; 37 reg = <0>; 38 }; 39 }; 40 41 apb@80000000 { 42 compatible = "simple-bus"; 43 #address-cells = <1>; 44 #size-cells = <1>; 45 reg = <0x80000000 0x80000>; 46 ranges; 47 48 apbh@80000000 { 49 compatible = "simple-bus"; 50 #address-cells = <1>; 51 #size-cells = <1>; 52 reg = <0x80000000 0x40000>; 53 ranges; 54 55 icoll: interrupt-controller@80000000 { 56 compatible = "fsl,imx23-icoll", "fsl,icoll"; 57 interrupt-controller; 58 #interrupt-cells = <1>; 59 reg = <0x80000000 0x2000>; 60 }; 61 62 dma_apbh: dma-apbh@80004000 { 63 compatible = "fsl,imx23-dma-apbh"; 64 reg = <0x80004000 0x2000>; 65 interrupts = <0 14 20 0 66 13 13 13 13>; 67 interrupt-names = "empty", "ssp0", "ssp1", "empty", 68 "gpmi0", "gpmi1", "gpmi2", "gpmi3"; 69 #dma-cells = <1>; 70 dma-channels = <8>; 71 clocks = <&clks 15>; 72 }; 73 74 ecc@80008000 { 75 reg = <0x80008000 0x2000>; 76 status = "disabled"; 77 }; 78 79 nand-controller@8000c000 { 80 compatible = "fsl,imx23-gpmi-nand"; 81 #address-cells = <1>; 82 #size-cells = <1>; 83 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; 84 reg-names = "gpmi-nand", "bch"; 85 interrupts = <56>; 86 interrupt-names = "bch"; 87 clocks = <&clks 34>; 88 clock-names = "gpmi_io"; 89 dmas = <&dma_apbh 4>; 90 dma-names = "rx-tx"; 91 status = "disabled"; 92 }; 93 94 ssp0: spi@80010000 { 95 reg = <0x80010000 0x2000>; 96 interrupts = <15>; 97 clocks = <&clks 33>; 98 dmas = <&dma_apbh 1>; 99 dma-names = "rx-tx"; 100 status = "disabled"; 101 }; 102 103 etm@80014000 { 104 reg = <0x80014000 0x2000>; 105 status = "disabled"; 106 }; 107 108 pinctrl@80018000 { 109 #address-cells = <1>; 110 #size-cells = <0>; 111 compatible = "fsl,imx23-pinctrl", "simple-bus"; 112 reg = <0x80018000 0x2000>; 113 114 gpio0: gpio@0 { 115 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; 116 reg = <0>; 117 interrupts = <16>; 118 gpio-controller; 119 #gpio-cells = <2>; 120 interrupt-controller; 121 #interrupt-cells = <2>; 122 }; 123 124 gpio1: gpio@1 { 125 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; 126 reg = <1>; 127 interrupts = <17>; 128 gpio-controller; 129 #gpio-cells = <2>; 130 interrupt-controller; 131 #interrupt-cells = <2>; 132 }; 133 134 gpio2: gpio@2 { 135 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; 136 reg = <2>; 137 interrupts = <18>; 138 gpio-controller; 139 #gpio-cells = <2>; 140 interrupt-controller; 141 #interrupt-cells = <2>; 142 }; 143 144 duart_pins_a: duart@0 { 145 reg = <0>; 146 fsl,pinmux-ids = < 147 MX23_PAD_PWM0__DUART_RX 148 MX23_PAD_PWM1__DUART_TX 149 >; 150 fsl,drive-strength = <MXS_DRIVE_4mA>; 151 fsl,voltage = <MXS_VOLTAGE_HIGH>; 152 fsl,pull-up = <MXS_PULL_DISABLE>; 153 }; 154 155 auart0_pins_a: auart0@0 { 156 reg = <0>; 157 fsl,pinmux-ids = < 158 MX23_PAD_AUART1_RX__AUART1_RX 159 MX23_PAD_AUART1_TX__AUART1_TX 160 MX23_PAD_AUART1_CTS__AUART1_CTS 161 MX23_PAD_AUART1_RTS__AUART1_RTS 162 >; 163 fsl,drive-strength = <MXS_DRIVE_4mA>; 164 fsl,voltage = <MXS_VOLTAGE_HIGH>; 165 fsl,pull-up = <MXS_PULL_DISABLE>; 166 }; 167 168 auart0_2pins_a: auart0-2pins@0 { 169 reg = <0>; 170 fsl,pinmux-ids = < 171 MX23_PAD_I2C_SCL__AUART1_TX 172 MX23_PAD_I2C_SDA__AUART1_RX 173 >; 174 fsl,drive-strength = <MXS_DRIVE_4mA>; 175 fsl,voltage = <MXS_VOLTAGE_HIGH>; 176 fsl,pull-up = <MXS_PULL_DISABLE>; 177 }; 178 179 auart1_2pins_a: auart1-2pins@0 { 180 reg = <0>; 181 fsl,pinmux-ids = < 182 MX23_PAD_GPMI_D14__AUART2_RX 183 MX23_PAD_GPMI_D15__AUART2_TX 184 >; 185 fsl,drive-strength = <MXS_DRIVE_4mA>; 186 fsl,voltage = <MXS_VOLTAGE_HIGH>; 187 fsl,pull-up = <MXS_PULL_DISABLE>; 188 }; 189 190 gpmi_pins_a: gpmi-nand@0 { 191 reg = <0>; 192 fsl,pinmux-ids = < 193 MX23_PAD_GPMI_D00__GPMI_D00 194 MX23_PAD_GPMI_D01__GPMI_D01 195 MX23_PAD_GPMI_D02__GPMI_D02 196 MX23_PAD_GPMI_D03__GPMI_D03 197 MX23_PAD_GPMI_D04__GPMI_D04 198 MX23_PAD_GPMI_D05__GPMI_D05 199 MX23_PAD_GPMI_D06__GPMI_D06 200 MX23_PAD_GPMI_D07__GPMI_D07 201 MX23_PAD_GPMI_CLE__GPMI_CLE 202 MX23_PAD_GPMI_ALE__GPMI_ALE 203 MX23_PAD_GPMI_RDY0__GPMI_RDY0 204 MX23_PAD_GPMI_RDY1__GPMI_RDY1 205 MX23_PAD_GPMI_WPN__GPMI_WPN 206 MX23_PAD_GPMI_WRN__GPMI_WRN 207 MX23_PAD_GPMI_RDN__GPMI_RDN 208 MX23_PAD_GPMI_CE1N__GPMI_CE1N 209 MX23_PAD_GPMI_CE0N__GPMI_CE0N 210 >; 211 fsl,drive-strength = <MXS_DRIVE_4mA>; 212 fsl,voltage = <MXS_VOLTAGE_HIGH>; 213 fsl,pull-up = <MXS_PULL_DISABLE>; 214 }; 215 216 gpmi_pins_fixup: gpmi-pins-fixup@0 { 217 reg = <0>; 218 fsl,pinmux-ids = < 219 MX23_PAD_GPMI_WPN__GPMI_WPN 220 MX23_PAD_GPMI_WRN__GPMI_WRN 221 MX23_PAD_GPMI_RDN__GPMI_RDN 222 >; 223 fsl,drive-strength = <MXS_DRIVE_12mA>; 224 }; 225 226 mmc0_4bit_pins_a: mmc0-4bit@0 { 227 reg = <0>; 228 fsl,pinmux-ids = < 229 MX23_PAD_SSP1_DATA0__SSP1_DATA0 230 MX23_PAD_SSP1_DATA1__SSP1_DATA1 231 MX23_PAD_SSP1_DATA2__SSP1_DATA2 232 MX23_PAD_SSP1_DATA3__SSP1_DATA3 233 MX23_PAD_SSP1_CMD__SSP1_CMD 234 MX23_PAD_SSP1_SCK__SSP1_SCK 235 >; 236 fsl,drive-strength = <MXS_DRIVE_8mA>; 237 fsl,voltage = <MXS_VOLTAGE_HIGH>; 238 fsl,pull-up = <MXS_PULL_ENABLE>; 239 }; 240 241 mmc0_8bit_pins_a: mmc0-8bit@0 { 242 reg = <0>; 243 fsl,pinmux-ids = < 244 MX23_PAD_SSP1_DATA0__SSP1_DATA0 245 MX23_PAD_SSP1_DATA1__SSP1_DATA1 246 MX23_PAD_SSP1_DATA2__SSP1_DATA2 247 MX23_PAD_SSP1_DATA3__SSP1_DATA3 248 MX23_PAD_GPMI_D08__SSP1_DATA4 249 MX23_PAD_GPMI_D09__SSP1_DATA5 250 MX23_PAD_GPMI_D10__SSP1_DATA6 251 MX23_PAD_GPMI_D11__SSP1_DATA7 252 MX23_PAD_SSP1_CMD__SSP1_CMD 253 MX23_PAD_SSP1_DETECT__SSP1_DETECT 254 MX23_PAD_SSP1_SCK__SSP1_SCK 255 >; 256 fsl,drive-strength = <MXS_DRIVE_8mA>; 257 fsl,voltage = <MXS_VOLTAGE_HIGH>; 258 fsl,pull-up = <MXS_PULL_ENABLE>; 259 }; 260 261 mmc0_pins_fixup: mmc0-pins-fixup@0 { 262 reg = <0>; 263 fsl,pinmux-ids = < 264 MX23_PAD_SSP1_DETECT__SSP1_DETECT 265 MX23_PAD_SSP1_SCK__SSP1_SCK 266 >; 267 fsl,pull-up = <MXS_PULL_DISABLE>; 268 }; 269 270 mmc0_sck_cfg: mmc0-sck-cfg@0 { 271 reg = <0>; 272 fsl,pinmux-ids = < 273 MX23_PAD_SSP1_SCK__SSP1_SCK 274 >; 275 fsl,pull-up = <MXS_PULL_DISABLE>; 276 }; 277 278 mmc1_4bit_pins_a: mmc1-4bit@0 { 279 reg = <0>; 280 fsl,pinmux-ids = < 281 MX23_PAD_GPMI_D00__SSP2_DATA0 282 MX23_PAD_GPMI_D01__SSP2_DATA1 283 MX23_PAD_GPMI_D02__SSP2_DATA2 284 MX23_PAD_GPMI_D03__SSP2_DATA3 285 MX23_PAD_GPMI_RDY1__SSP2_CMD 286 MX23_PAD_GPMI_WRN__SSP2_SCK 287 >; 288 fsl,drive-strength = <MXS_DRIVE_8mA>; 289 fsl,voltage = <MXS_VOLTAGE_HIGH>; 290 fsl,pull-up = <MXS_PULL_ENABLE>; 291 }; 292 293 mmc1_8bit_pins_a: mmc1-8bit@0 { 294 reg = <0>; 295 fsl,pinmux-ids = < 296 MX23_PAD_GPMI_D00__SSP2_DATA0 297 MX23_PAD_GPMI_D01__SSP2_DATA1 298 MX23_PAD_GPMI_D02__SSP2_DATA2 299 MX23_PAD_GPMI_D03__SSP2_DATA3 300 MX23_PAD_GPMI_D04__SSP2_DATA4 301 MX23_PAD_GPMI_D05__SSP2_DATA5 302 MX23_PAD_GPMI_D06__SSP2_DATA6 303 MX23_PAD_GPMI_D07__SSP2_DATA7 304 MX23_PAD_GPMI_RDY1__SSP2_CMD 305 MX23_PAD_GPMI_WRN__SSP2_SCK 306 >; 307 fsl,drive-strength = <MXS_DRIVE_8mA>; 308 fsl,voltage = <MXS_VOLTAGE_HIGH>; 309 fsl,pull-up = <MXS_PULL_ENABLE>; 310 }; 311 312 pwm2_pins_a: pwm2@0 { 313 reg = <0>; 314 fsl,pinmux-ids = < 315 MX23_PAD_PWM2__PWM2 316 >; 317 fsl,drive-strength = <MXS_DRIVE_4mA>; 318 fsl,voltage = <MXS_VOLTAGE_HIGH>; 319 fsl,pull-up = <MXS_PULL_DISABLE>; 320 }; 321 322 lcdif_24bit_pins_a: lcdif-24bit@0 { 323 reg = <0>; 324 fsl,pinmux-ids = < 325 MX23_PAD_LCD_D00__LCD_D00 326 MX23_PAD_LCD_D01__LCD_D01 327 MX23_PAD_LCD_D02__LCD_D02 328 MX23_PAD_LCD_D03__LCD_D03 329 MX23_PAD_LCD_D04__LCD_D04 330 MX23_PAD_LCD_D05__LCD_D05 331 MX23_PAD_LCD_D06__LCD_D06 332 MX23_PAD_LCD_D07__LCD_D07 333 MX23_PAD_LCD_D08__LCD_D08 334 MX23_PAD_LCD_D09__LCD_D09 335 MX23_PAD_LCD_D10__LCD_D10 336 MX23_PAD_LCD_D11__LCD_D11 337 MX23_PAD_LCD_D12__LCD_D12 338 MX23_PAD_LCD_D13__LCD_D13 339 MX23_PAD_LCD_D14__LCD_D14 340 MX23_PAD_LCD_D15__LCD_D15 341 MX23_PAD_LCD_D16__LCD_D16 342 MX23_PAD_LCD_D17__LCD_D17 343 MX23_PAD_GPMI_D08__LCD_D18 344 MX23_PAD_GPMI_D09__LCD_D19 345 MX23_PAD_GPMI_D10__LCD_D20 346 MX23_PAD_GPMI_D11__LCD_D21 347 MX23_PAD_GPMI_D12__LCD_D22 348 MX23_PAD_GPMI_D13__LCD_D23 349 MX23_PAD_LCD_DOTCK__LCD_DOTCK 350 MX23_PAD_LCD_ENABLE__LCD_ENABLE 351 MX23_PAD_LCD_HSYNC__LCD_HSYNC 352 MX23_PAD_LCD_VSYNC__LCD_VSYNC 353 >; 354 fsl,drive-strength = <MXS_DRIVE_4mA>; 355 fsl,voltage = <MXS_VOLTAGE_HIGH>; 356 fsl,pull-up = <MXS_PULL_DISABLE>; 357 }; 358 359 spi2_pins_a: spi2@0 { 360 reg = <0>; 361 fsl,pinmux-ids = < 362 MX23_PAD_GPMI_WRN__SSP2_SCK 363 MX23_PAD_GPMI_RDY1__SSP2_CMD 364 MX23_PAD_GPMI_D00__SSP2_DATA0 365 MX23_PAD_GPMI_D03__SSP2_DATA3 366 >; 367 fsl,drive-strength = <MXS_DRIVE_8mA>; 368 fsl,voltage = <MXS_VOLTAGE_HIGH>; 369 fsl,pull-up = <MXS_PULL_ENABLE>; 370 }; 371 372 i2c_pins_a: i2c@0 { 373 reg = <0>; 374 fsl,pinmux-ids = < 375 MX23_PAD_I2C_SCL__I2C_SCL 376 MX23_PAD_I2C_SDA__I2C_SDA 377 >; 378 fsl,drive-strength = <MXS_DRIVE_8mA>; 379 fsl,voltage = <MXS_VOLTAGE_HIGH>; 380 fsl,pull-up = <MXS_PULL_ENABLE>; 381 }; 382 383 i2c_pins_b: i2c@1 { 384 reg = <1>; 385 fsl,pinmux-ids = < 386 MX23_PAD_LCD_ENABLE__I2C_SCL 387 MX23_PAD_LCD_HSYNC__I2C_SDA 388 >; 389 fsl,drive-strength = <MXS_DRIVE_8mA>; 390 fsl,voltage = <MXS_VOLTAGE_HIGH>; 391 fsl,pull-up = <MXS_PULL_ENABLE>; 392 }; 393 394 i2c_pins_c: i2c@2 { 395 reg = <2>; 396 fsl,pinmux-ids = < 397 MX23_PAD_SSP1_DATA1__I2C_SCL 398 MX23_PAD_SSP1_DATA2__I2C_SDA 399 >; 400 fsl,drive-strength = <MXS_DRIVE_8mA>; 401 fsl,voltage = <MXS_VOLTAGE_HIGH>; 402 fsl,pull-up = <MXS_PULL_ENABLE>; 403 }; 404 }; 405 406 digctl@8001c000 { 407 compatible = "fsl,imx23-digctl"; 408 reg = <0x8001c000 2000>; 409 status = "disabled"; 410 }; 411 412 emi@80020000 { 413 reg = <0x80020000 0x2000>; 414 status = "disabled"; 415 }; 416 417 dma_apbx: dma-apbx@80024000 { 418 compatible = "fsl,imx23-dma-apbx"; 419 reg = <0x80024000 0x2000>; 420 interrupts = <7 5 9 26 421 19 0 25 23 422 60 58 9 0 423 0 0 0 0>; 424 interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c", 425 "saif0", "empty", "auart0-rx", "auart0-tx", 426 "auart1-rx", "auart1-tx", "saif1", "empty", 427 "empty", "empty", "empty", "empty"; 428 #dma-cells = <1>; 429 dma-channels = <16>; 430 clocks = <&clks 16>; 431 }; 432 433 dcp: crypto@80028000 { 434 compatible = "fsl,imx23-dcp"; 435 reg = <0x80028000 0x2000>; 436 interrupts = <53 54>; 437 status = "okay"; 438 }; 439 440 pxp@8002a000 { 441 reg = <0x8002a000 0x2000>; 442 status = "disabled"; 443 }; 444 445 efuse@8002c000 { 446 compatible = "fsl,imx23-ocotp", "fsl,ocotp"; 447 #address-cells = <1>; 448 #size-cells = <1>; 449 reg = <0x8002c000 0x2000>; 450 clocks = <&clks 15>; 451 }; 452 453 axi-ahb@8002e000 { 454 reg = <0x8002e000 0x2000>; 455 status = "disabled"; 456 }; 457 458 lcdif@80030000 { 459 compatible = "fsl,imx23-lcdif"; 460 reg = <0x80030000 2000>; 461 interrupts = <46 45>; 462 clocks = <&clks 38>; 463 status = "disabled"; 464 }; 465 466 ssp1: spi@80034000 { 467 reg = <0x80034000 0x2000>; 468 interrupts = <2>; 469 clocks = <&clks 33>; 470 dmas = <&dma_apbh 2>; 471 dma-names = "rx-tx"; 472 status = "disabled"; 473 }; 474 475 tvenc@80038000 { 476 reg = <0x80038000 0x2000>; 477 status = "disabled"; 478 }; 479 }; 480 481 apbx@80040000 { 482 compatible = "simple-bus"; 483 #address-cells = <1>; 484 #size-cells = <1>; 485 reg = <0x80040000 0x40000>; 486 ranges; 487 488 clks: clkctrl@80040000 { 489 compatible = "fsl,imx23-clkctrl", "fsl,clkctrl"; 490 reg = <0x80040000 0x2000>; 491 #clock-cells = <1>; 492 }; 493 494 saif0: saif@80042000 { 495 reg = <0x80042000 0x2000>; 496 dmas = <&dma_apbx 4>; 497 dma-names = "rx-tx"; 498 status = "disabled"; 499 }; 500 501 power@80044000 { 502 reg = <0x80044000 0x2000>; 503 status = "disabled"; 504 }; 505 506 saif1: saif@80046000 { 507 reg = <0x80046000 0x2000>; 508 dmas = <&dma_apbx 10>; 509 dma-names = "rx-tx"; 510 status = "disabled"; 511 }; 512 513 audio-out@80048000 { 514 reg = <0x80048000 0x2000>; 515 dmas = <&dma_apbx 1>; 516 dma-names = "tx"; 517 status = "disabled"; 518 }; 519 520 audio-in@8004c000 { 521 reg = <0x8004c000 0x2000>; 522 dmas = <&dma_apbx 0>; 523 dma-names = "rx"; 524 status = "disabled"; 525 }; 526 527 lradc: lradc@80050000 { 528 compatible = "fsl,imx23-lradc"; 529 reg = <0x80050000 0x2000>; 530 interrupts = <36 37 38 39 40 41 42 43 44>; 531 status = "disabled"; 532 clocks = <&clks 26>; 533 #io-channel-cells = <1>; 534 }; 535 536 spdif@80054000 { 537 reg = <0x80054000 2000>; 538 dmas = <&dma_apbx 2>; 539 dma-names = "tx"; 540 status = "disabled"; 541 }; 542 543 i2c: i2c@80058000 { 544 #address-cells = <1>; 545 #size-cells = <0>; 546 compatible = "fsl,imx23-i2c"; 547 reg = <0x80058000 0x2000>; 548 interrupts = <27>; 549 clock-frequency = <100000>; 550 dmas = <&dma_apbx 3>; 551 dma-names = "rx-tx"; 552 status = "disabled"; 553 }; 554 555 rtc@8005c000 { 556 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc"; 557 reg = <0x8005c000 0x2000>; 558 interrupts = <22>; 559 }; 560 561 pwm: pwm@80064000 { 562 compatible = "fsl,imx23-pwm"; 563 reg = <0x80064000 0x2000>; 564 clocks = <&clks 30>; 565 #pwm-cells = <2>; 566 fsl,pwm-number = <5>; 567 status = "disabled"; 568 }; 569 570 timrot@80068000 { 571 compatible = "fsl,imx23-timrot", "fsl,timrot"; 572 reg = <0x80068000 0x2000>; 573 interrupts = <28 29 30 31>; 574 clocks = <&clks 28>; 575 }; 576 577 auart0: serial@8006c000 { 578 compatible = "fsl,imx23-auart"; 579 reg = <0x8006c000 0x2000>; 580 interrupts = <24>; 581 clocks = <&clks 32>; 582 dmas = <&dma_apbx 6>, <&dma_apbx 7>; 583 dma-names = "rx", "tx"; 584 status = "disabled"; 585 }; 586 587 auart1: serial@8006e000 { 588 compatible = "fsl,imx23-auart"; 589 reg = <0x8006e000 0x2000>; 590 interrupts = <59>; 591 clocks = <&clks 32>; 592 dmas = <&dma_apbx 8>, <&dma_apbx 9>; 593 dma-names = "rx", "tx"; 594 status = "disabled"; 595 }; 596 597 duart: serial@80070000 { 598 compatible = "arm,pl011", "arm,primecell"; 599 reg = <0x80070000 0x2000>; 600 interrupts = <0>; 601 clocks = <&clks 32>, <&clks 16>; 602 clock-names = "uart", "apb_pclk"; 603 status = "disabled"; 604 }; 605 606 usbphy0: usbphy@8007c000 { 607 compatible = "fsl,imx23-usbphy"; 608 reg = <0x8007c000 0x2000>; 609 clocks = <&clks 41>; 610 status = "disabled"; 611 }; 612 }; 613 }; 614 615 ahb@80080000 { 616 compatible = "simple-bus"; 617 #address-cells = <1>; 618 #size-cells = <1>; 619 reg = <0x80080000 0x80000>; 620 ranges; 621 622 usb0: usb@80080000 { 623 compatible = "fsl,imx23-usb", "fsl,imx27-usb"; 624 reg = <0x80080000 0x40000>; 625 interrupts = <11>; 626 fsl,usbphy = <&usbphy0>; 627 clocks = <&clks 40>; 628 status = "disabled"; 629 }; 630 }; 631 632 iio-hwmon { 633 compatible = "iio-hwmon"; 634 io-channels = <&lradc 8>; 635 }; 636 };
Cache object: d9d670b9856799f12d01b0ad92e9d4f7
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