The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/imx35-eukrea-cpuimx35.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0-or-later
    2 /*
    3  * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
    4  */
    5 
    6 #include "imx35.dtsi"
    7 
    8 / {
    9         model = "Eukrea CPUIMX35";
   10         compatible = "eukrea,cpuimx35", "fsl,imx35";
   11 
   12         memory@80000000 {
   13                 device_type = "memory";
   14                 reg = <0x80000000 0x8000000>; /* 128M */
   15         };
   16 };
   17 
   18 &fec {
   19         pinctrl-names = "default";
   20         pinctrl-0 = <&pinctrl_fec>;
   21         status = "okay";
   22 };
   23 
   24 &i2c1 {
   25         pinctrl-names = "default";
   26         pinctrl-0 = <&pinctrl_i2c1>;
   27         status = "okay";
   28 
   29         pcf8563@51 {
   30                 compatible = "nxp,pcf8563";
   31                 reg = <0x51>;
   32         };
   33 
   34         tsc2007: tsc2007@48 {
   35                 compatible = "ti,tsc2007";
   36                 gpios = <&gpio3 2 0>;
   37                 interrupt-parent = <&gpio3>;
   38                 interrupts = <0x2 0x8>;
   39                 pinctrl-names = "default";
   40                 pinctrl-0 = <&pinctrl_tsc2007_1>;
   41                 reg = <0x48>;
   42                 ti,x-plate-ohms = <180>;
   43         };
   44 };
   45 
   46 &iomuxc {
   47         imx35-eukrea {
   48                 pinctrl_fec: fecgrp {
   49                         fsl,pins = <
   50                                 MX35_PAD_FEC_TX_CLK__FEC_TX_CLK         0x80000000
   51                                 MX35_PAD_FEC_RX_CLK__FEC_RX_CLK         0x80000000
   52                                 MX35_PAD_FEC_RX_DV__FEC_RX_DV           0x80000000
   53                                 MX35_PAD_FEC_COL__FEC_COL               0x80000000
   54                                 MX35_PAD_FEC_RDATA0__FEC_RDATA_0        0x80000000
   55                                 MX35_PAD_FEC_TDATA0__FEC_TDATA_0        0x80000000
   56                                 MX35_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
   57                                 MX35_PAD_FEC_MDC__FEC_MDC               0x80000000
   58                                 MX35_PAD_FEC_MDIO__FEC_MDIO             0x80000000
   59                                 MX35_PAD_FEC_TX_ERR__FEC_TX_ERR         0x80000000
   60                                 MX35_PAD_FEC_RX_ERR__FEC_RX_ERR         0x80000000
   61                                 MX35_PAD_FEC_CRS__FEC_CRS               0x80000000
   62                                 MX35_PAD_FEC_RDATA1__FEC_RDATA_1        0x80000000
   63                                 MX35_PAD_FEC_TDATA1__FEC_TDATA_1        0x80000000
   64                                 MX35_PAD_FEC_RDATA2__FEC_RDATA_2        0x80000000
   65                                 MX35_PAD_FEC_TDATA2__FEC_TDATA_2        0x80000000
   66                                 MX35_PAD_FEC_RDATA3__FEC_RDATA_3        0x80000000
   67                                 MX35_PAD_FEC_TDATA3__FEC_TDATA_3        0x80000000
   68                         >;
   69                 };
   70 
   71                 pinctrl_i2c1: i2c1grp {
   72                         fsl,pins = <
   73                                 MX35_PAD_I2C1_CLK__I2C1_SCL             0x80000000
   74                                 MX35_PAD_I2C1_DAT__I2C1_SDA             0x80000000
   75                         >;
   76                 };
   77 
   78                 pinctrl_tsc2007_1: tsc2007grp-1 {
   79                         fsl,pins = <MX35_PAD_ATA_DA2__GPIO3_2 0x80000000>;
   80                 };
   81         };
   82 };
   83 
   84 &nfc {
   85         nand-bus-width = <8>;
   86         nand-ecc-mode = "hw";
   87         nand-on-flash-bbt;
   88         status = "okay";
   89 };

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