Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/imx53-m53evk.dts
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1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2013 Marek Vasut <marex@denx.de> 4 */ 5 6 /dts-v1/; 7 #include "imx53-m53.dtsi" 8 9 / { 10 model = "Aries/DENX M53EVK"; 11 compatible = "aries,imx53-m53evk", "denx,imx53-m53evk", "fsl,imx53"; 12 13 display1: disp1 { 14 compatible = "fsl,imx-parallel-display"; 15 interface-pix-fmt = "bgr666"; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&pinctrl_ipu_disp1>; 18 19 display-timings { 20 800x480p60 { 21 native-mode; 22 clock-frequency = <31500000>; 23 hactive = <800>; 24 vactive = <480>; 25 hfront-porch = <40>; 26 hback-porch = <88>; 27 hsync-len = <128>; 28 vback-porch = <33>; 29 vfront-porch = <9>; 30 vsync-len = <3>; 31 vsync-active = <1>; 32 }; 33 }; 34 35 port { 36 display1_in: endpoint { 37 remote-endpoint = <&ipu_di1_disp1>; 38 }; 39 }; 40 }; 41 42 backlight { 43 compatible = "pwm-backlight"; 44 pwms = <&pwm1 0 3000>; 45 brightness-levels = <0 4 8 16 32 64 128 255>; 46 default-brightness-level = <6>; 47 power-supply = <®_backlight>; 48 }; 49 50 leds { 51 compatible = "gpio-leds"; 52 pinctrl-names = "default"; 53 pinctrl-0 = <&led_pin_gpio>; 54 55 user1 { 56 label = "user1"; 57 gpios = <&gpio2 8 0>; 58 linux,default-trigger = "heartbeat"; 59 }; 60 61 user2 { 62 label = "user2"; 63 gpios = <&gpio2 9 0>; 64 linux,default-trigger = "heartbeat"; 65 }; 66 }; 67 68 regulators { 69 compatible = "simple-bus"; 70 #address-cells = <1>; 71 #size-cells = <0>; 72 73 reg_usbh1_vbus: regulator@3 { 74 compatible = "regulator-fixed"; 75 reg = <3>; 76 regulator-name = "vbus"; 77 regulator-min-microvolt = <5000000>; 78 regulator-max-microvolt = <5000000>; 79 gpio = <&gpio1 2 0>; 80 }; 81 82 reg_usb_otg_vbus: regulator@4 { 83 compatible = "regulator-fixed"; 84 reg = <4>; 85 regulator-name = "usb_otg_vbus"; 86 regulator-min-microvolt = <5000000>; 87 regulator-max-microvolt = <5000000>; 88 gpio = <&gpio1 4 0>; 89 }; 90 }; 91 92 sound { 93 compatible = "fsl,imx53-m53evk-sgtl5000", 94 "fsl,imx-audio-sgtl5000"; 95 model = "imx53-m53evk-sgtl5000"; 96 ssi-controller = <&ssi2>; 97 audio-codec = <&sgtl5000>; 98 audio-routing = 99 "MIC_IN", "Mic Jack", 100 "Mic Jack", "Mic Bias", 101 "LINE_IN", "Line In Jack", 102 "Headphone Jack", "HP_OUT", 103 "Ext Spk", "LINE_OUT"; 104 mux-int-port = <2>; 105 mux-ext-port = <4>; 106 }; 107 }; 108 109 &audmux { 110 pinctrl-names = "default"; 111 pinctrl-0 = <&pinctrl_audmux>; 112 status = "okay"; 113 }; 114 115 &can1 { 116 pinctrl-names = "default"; 117 pinctrl-0 = <&pinctrl_can1>; 118 status = "okay"; 119 }; 120 121 &can2 { 122 pinctrl-names = "default"; 123 pinctrl-0 = <&pinctrl_can2>; 124 status = "okay"; 125 }; 126 127 &esdhc1 { 128 pinctrl-names = "default"; 129 pinctrl-0 = <&pinctrl_esdhc1>; 130 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 131 wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 132 status = "okay"; 133 }; 134 135 &fec { 136 pinctrl-names = "default"; 137 pinctrl-0 = <&pinctrl_fec>; 138 phy-mode = "rmii"; 139 status = "okay"; 140 }; 141 142 &i2c1 { 143 pinctrl-names = "default"; 144 pinctrl-0 = <&pinctrl_i2c1>; 145 status = "okay"; 146 147 sgtl5000: codec@a { 148 compatible = "fsl,sgtl5000"; 149 reg = <0x0a>; 150 #sound-dai-cells = <0>; 151 VDDA-supply = <®_3p2v>; 152 VDDIO-supply = <®_3p2v>; 153 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>; 154 }; 155 }; 156 157 &i2c3 { 158 pinctrl-names = "default"; 159 pinctrl-0 = <&pinctrl_i2c3>; 160 status = "okay"; 161 }; 162 163 &iomuxc { 164 pinctrl-names = "default"; 165 pinctrl-0 = <&pinctrl_hog>; 166 167 imx53-m53evk { 168 pinctrl_usb: usbgrp { 169 fsl,pins = < 170 MX53_PAD_GPIO_2__GPIO1_2 0x80000000 171 MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x80000000 172 >; 173 }; 174 175 pinctrl_usbotg: usbotggrp { 176 fsl,pins = < 177 MX53_PAD_GPIO_4__GPIO1_4 0x000b0 178 >; 179 }; 180 181 led_pin_gpio: led_gpio { 182 fsl,pins = < 183 MX53_PAD_PATA_DATA8__GPIO2_8 0x80000000 184 MX53_PAD_PATA_DATA9__GPIO2_9 0x80000000 185 >; 186 }; 187 188 pinctrl_audmux: audmuxgrp { 189 fsl,pins = < 190 MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x80000000 191 MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x80000000 192 MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x80000000 193 MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x80000000 194 >; 195 }; 196 197 pinctrl_can1: can1grp { 198 fsl,pins = < 199 MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000 200 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000 201 >; 202 }; 203 204 pinctrl_can2: can2grp { 205 fsl,pins = < 206 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000 207 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000 208 >; 209 }; 210 211 pinctrl_esdhc1: esdhc1grp { 212 fsl,pins = < 213 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 214 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 215 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 216 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 217 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 218 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 219 >; 220 }; 221 222 pinctrl_fec: fecgrp { 223 fsl,pins = < 224 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 225 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 226 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 227 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 228 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 229 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 230 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 231 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 232 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 233 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 234 >; 235 }; 236 237 pinctrl_i2c1: i2c1grp { 238 fsl,pins = < 239 MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000 240 MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000 241 >; 242 }; 243 244 pinctrl_i2c3: i2c3grp { 245 fsl,pins = < 246 MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000 247 MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000 248 >; 249 }; 250 251 pinctrl_ipu_disp1: ipudisp1grp { 252 fsl,pins = < 253 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x5 254 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x5 255 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x5 256 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x5 257 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x5 258 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x5 259 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x5 260 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x5 261 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x5 262 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x5 263 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x5 264 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x5 265 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x5 266 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x5 267 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x5 268 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x5 269 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x5 270 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x5 271 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x5 272 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x5 273 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x5 274 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x5 275 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x5 276 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x5 277 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x5 278 MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x5 279 MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x5 280 MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x5 281 MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x5 282 MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x5 283 MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x5 284 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x5 285 >; 286 }; 287 288 pinctrl_pwm1: pwm1grp { 289 fsl,pins = < 290 MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x5 291 >; 292 }; 293 294 pinctrl_uart1: uart1grp { 295 fsl,pins = < 296 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 297 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 298 >; 299 }; 300 301 pinctrl_uart2: uart2grp { 302 fsl,pins = < 303 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 304 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 305 >; 306 }; 307 308 pinctrl_uart3: uart3grp { 309 fsl,pins = < 310 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4 311 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4 312 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4 313 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4 314 >; 315 }; 316 }; 317 }; 318 319 &ipu_di1_disp1 { 320 remote-endpoint = <&display1_in>; 321 }; 322 323 &pwm1 { 324 #pwm-cells = <2>; 325 pinctrl-names = "default"; 326 pinctrl-0 = <&pinctrl_pwm1>; 327 status = "okay"; 328 }; 329 330 &sata { 331 status = "okay"; 332 }; 333 334 &ssi2 { 335 status = "okay"; 336 }; 337 338 &uart1 { 339 pinctrl-names = "default"; 340 pinctrl-0 = <&pinctrl_uart1>; 341 status = "okay"; 342 }; 343 344 &uart2 { 345 pinctrl-names = "default"; 346 pinctrl-0 = <&pinctrl_uart2>; 347 status = "okay"; 348 }; 349 350 &uart3 { 351 pinctrl-names = "default"; 352 pinctrl-0 = <&pinctrl_uart3>; 353 status = "okay"; 354 }; 355 356 &usbh1 { 357 pinctrl-names = "default"; 358 pinctrl-0 = <&pinctrl_usb>; 359 vbus-supply = <®_usbh1_vbus>; 360 phy_type = "utmi"; 361 status = "okay"; 362 }; 363 364 &usbotg { 365 pinctrl-names = "default"; 366 pinctrl-0 = <&pinctrl_usbotg>; 367 dr_mode = "otg"; 368 vbus-supply = <®_usb_otg_vbus>; 369 disable-over-current; 370 status = "okay"; 371 };
Cache object: 5f58607f81fe984b45858df7aaff7cb2
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