The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/imx6dl-prtrvt.dts

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    1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
    2 /*
    3  * Copyright (c) 2014 Protonic Holland
    4  */
    5 
    6 /dts-v1/;
    7 #include "imx6dl.dtsi"
    8 #include "imx6qdl-prti6q.dtsi"
    9 #include <dt-bindings/leds/common.h>
   10 
   11 / {
   12         model = "Protonic RVT board";
   13         compatible = "prt,prtrvt", "fsl,imx6dl";
   14 
   15         memory@10000000 {
   16                 device_type = "memory";
   17                 reg = <0x10000000 0x10000000>;
   18         };
   19 
   20         leds {
   21                 compatible = "gpio-leds";
   22                 pinctrl-names = "default";
   23                 pinctrl-0 = <&pinctrl_leds>;
   24 
   25                 led-debug0 {
   26                         function = LED_FUNCTION_STATUS;
   27                         gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
   28                         linux,default-trigger = "heartbeat";
   29                 };
   30         };
   31 };
   32 
   33 &can1 {
   34         pinctrl-names = "default";
   35         pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>;
   36         status = "okay";
   37 };
   38 
   39 &ecspi1 {
   40         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
   41         pinctrl-names = "default";
   42         pinctrl-0 = <&pinctrl_ecspi1>;
   43         status = "okay";
   44 
   45         flash@0 {
   46                 compatible = "jedec,spi-nor";
   47                 reg = <0>;
   48                 spi-max-frequency = <20000000>;
   49                 #address-cells = <1>;
   50                 #size-cells = <1>;
   51         };
   52 };
   53 
   54 &ecspi3 {
   55         cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
   56         pinctrl-names = "default";
   57         pinctrl-0 = <&pinctrl_ecspi3>;
   58         status = "okay";
   59 
   60         nfc@0 {
   61                 compatible = "ti,trf7970a";
   62                 reg = <0>;
   63                 pinctrl-names = "default";
   64                 pinctrl-0 = <&pinctrl_nfc>;
   65                 spi-max-frequency = <2000000>;
   66                 interrupts-extended = <&gpio5 14 IRQ_TYPE_LEVEL_LOW>;
   67                 ti,enable-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>,
   68                                   <&gpio5 11 GPIO_ACTIVE_LOW>;
   69                 vin-supply = <&reg_3v3>;
   70                 autosuspend-delay = <30000>;
   71                 irq-status-read-quirk;
   72                 en2-rf-quirk;
   73                 status = "okay";
   74         };
   75 };
   76 
   77 &i2c3 {
   78         adc@49 {
   79                 compatible = "ti,ads1015";
   80                 reg = <0x49>;
   81                 #address-cells = <1>;
   82                 #size-cells = <0>;
   83 
   84                 /* nc */
   85                 channel@4 {
   86                         reg = <4>;
   87                         ti,gain = <3>;
   88                         ti,datarate = <3>;
   89                 };
   90 
   91                 /* nc */
   92                 channel@5 {
   93                         reg = <5>;
   94                         ti,gain = <3>;
   95                         ti,datarate = <3>;
   96                 };
   97 
   98                 /* can1_l */
   99                 channel@6 {
  100                         reg = <6>;
  101                         ti,gain = <3>;
  102                         ti,datarate = <3>;
  103                 };
  104 
  105                 /* can1_h */
  106                 channel@7 {
  107                         reg = <7>;
  108                         ti,gain = <3>;
  109                         ti,datarate = <3>;
  110                 };
  111         };
  112 
  113         rtc@51 {
  114                 compatible = "nxp,pcf8563";
  115                 reg = <0x51>;
  116         };
  117 };
  118 
  119 &pcie {
  120         status = "okay";
  121 };
  122 
  123 &usbh1 {
  124         status = "disabled";
  125 };
  126 
  127 &vpu {
  128         status = "disabled";
  129 };
  130 
  131 &iomuxc {
  132         pinctrl_can1phy: can1phy {
  133                 fsl,pins = <
  134                         /* CAN1_SR */
  135                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13070
  136                         /* CAN1_TERM */
  137                         MX6QDL_PAD_GPIO_0__GPIO1_IO00   0x1b0b0
  138                 >;
  139         };
  140 
  141         pinctrl_ecspi1: ecspi1grp {
  142                 fsl,pins = <
  143                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
  144                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
  145                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
  146                         /* CS */
  147                         MX6QDL_PAD_EIM_D19__GPIO3_IO19          0x000b1
  148                 >;
  149         };
  150 
  151         pinctrl_ecspi3: ecspi3grp {
  152                 fsl,pins = <
  153                         MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
  154                         MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
  155                         MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
  156                         MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24       0x000b1
  157                 >;
  158         };
  159 
  160         pinctrl_leds: ledsgrp {
  161                 fsl,pins = <
  162                         MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x1b0b0
  163                 >;
  164         };
  165 
  166         pinctrl_nfc: nfcgrp {
  167                 fsl,pins = <
  168                         /* NFC_ASK_OOK */
  169                         MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09      0x100b1
  170                         /* NFC_PWR_EN */
  171                         MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10      0x100b1
  172                         /* NFC_EN2 */
  173                         MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11      0x100b1
  174                         /* NFC_EN */
  175                         MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12      0x100b1
  176                         /* NFC_MOD */
  177                         MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13      0x100b1
  178                         /* NFC_IRQ */
  179                         MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14      0x100b1
  180                 >;
  181         };
  182 };

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