Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/contrib/device-tree/src/arm/imx6dl-yapp4-common.dtsi
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1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Copyright (C) 2015-2018 Y Soft Corporation, a.s. 4 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/pwm/pwm.h> 10 11 / { 12 aliases: aliases { 13 ethernet1 = ð1; 14 ethernet2 = ð2; 15 mmc0 = &usdhc3; 16 mmc1 = &usdhc4; 17 }; 18 19 backlight: backlight { 20 compatible = "pwm-backlight"; 21 pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>; 22 brightness-levels = <0 32 64 128 255>; 23 default-brightness-level = <32>; 24 num-interpolated-steps = <8>; 25 power-supply = <&sw2_reg>; 26 status = "disabled"; 27 }; 28 29 lcd_display: display { 30 compatible = "fsl,imx-parallel-display"; 31 #address-cells = <1>; 32 #size-cells = <0>; 33 interface-pix-fmt = "rgb24"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&pinctrl_ipu1>; 36 status = "disabled"; 37 38 port@0 { 39 reg = <0>; 40 41 lcd_display_in: endpoint { 42 remote-endpoint = <&ipu1_di0_disp0>; 43 }; 44 }; 45 46 port@1 { 47 reg = <1>; 48 49 lcd_display_out: endpoint { 50 remote-endpoint = <&lcd_panel_in>; 51 }; 52 }; 53 }; 54 55 panel: panel { 56 compatible = "dataimage,scf0700c48ggu18"; 57 power-supply = <&sw2_reg>; 58 status = "disabled"; 59 60 port { 61 lcd_panel_in: endpoint { 62 remote-endpoint = <&lcd_display_out>; 63 }; 64 }; 65 }; 66 67 reg_pcie: regulator-pcie { 68 compatible = "regulator-fixed"; 69 pinctrl-names = "default"; 70 pinctrl-0 = <&pinctrl_pcie_reg>; 71 regulator-name = "MPCIE_3V3"; 72 regulator-min-microvolt = <3300000>; 73 regulator-max-microvolt = <3300000>; 74 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; 75 enable-active-high; 76 status = "disabled"; 77 }; 78 79 reg_usb_h1_vbus: regulator-usb-h1-vbus { 80 compatible = "regulator-fixed"; 81 pinctrl-names = "default"; 82 pinctrl-0 = <&pinctrl_usbh1_vbus>; 83 regulator-name = "usb_h1_vbus"; 84 regulator-min-microvolt = <5000000>; 85 regulator-max-microvolt = <5000000>; 86 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>; 87 enable-active-high; 88 status = "disabled"; 89 }; 90 91 reg_usb_otg_vbus: regulator-usb-otg-vbus { 92 compatible = "regulator-fixed"; 93 pinctrl-names = "default"; 94 pinctrl-0 = <&pinctrl_usbotg_vbus>; 95 regulator-name = "usb_otg_vbus"; 96 regulator-min-microvolt = <5000000>; 97 regulator-max-microvolt = <5000000>; 98 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 99 enable-active-high; 100 status = "okay"; 101 }; 102 }; 103 104 &fec { 105 pinctrl-names = "default"; 106 pinctrl-0 = <&pinctrl_enet>; 107 phy-mode = "rgmii-id"; 108 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 109 phy-reset-duration = <20>; 110 phy-supply = <&sw2_reg>; 111 status = "okay"; 112 113 fixed-link { 114 speed = <1000>; 115 full-duplex; 116 }; 117 118 mdio { 119 #address-cells = <1>; 120 #size-cells = <0>; 121 122 phy_port2: phy@1 { 123 reg = <1>; 124 }; 125 126 phy_port3: phy@2 { 127 reg = <2>; 128 }; 129 130 switch@10 { 131 compatible = "qca,qca8334"; 132 reg = <10>; 133 134 switch_ports: ports { 135 #address-cells = <1>; 136 #size-cells = <0>; 137 138 ethphy0: port@0 { 139 reg = <0>; 140 label = "cpu"; 141 phy-mode = "rgmii-id"; 142 ethernet = <&fec>; 143 144 fixed-link { 145 speed = <1000>; 146 full-duplex; 147 }; 148 }; 149 150 eth2: port@2 { 151 reg = <2>; 152 label = "eth2"; 153 phy-handle = <&phy_port2>; 154 }; 155 156 eth1: port@3 { 157 reg = <3>; 158 label = "eth1"; 159 phy-handle = <&phy_port3>; 160 }; 161 }; 162 }; 163 }; 164 }; 165 166 &hdmi { 167 pinctrl-names = "default"; 168 pinctrl-0 = <&pinctrl_hdmi_cec>; 169 ddc-i2c-bus = <&i2c2>; 170 status = "disabled"; 171 }; 172 173 &i2c2 { 174 clock-frequency = <100000>; 175 pinctrl-names = "default"; 176 pinctrl-0 = <&pinctrl_i2c2>; 177 status = "okay"; 178 179 pmic@8 { 180 compatible = "fsl,pfuze200"; 181 pinctrl-names = "default"; 182 pinctrl-0 = <&pinctrl_pmic>; 183 reg = <0x8>; 184 185 regulators { 186 sw1a_reg: sw1ab { 187 regulator-min-microvolt = <300000>; 188 regulator-max-microvolt = <1875000>; 189 regulator-boot-on; 190 regulator-always-on; 191 regulator-ramp-delay = <6250>; 192 }; 193 194 sw2_reg: sw2 { 195 regulator-min-microvolt = <800000>; 196 regulator-max-microvolt = <3300000>; 197 regulator-boot-on; 198 regulator-always-on; 199 }; 200 201 sw3a_reg: sw3a { 202 regulator-min-microvolt = <400000>; 203 regulator-max-microvolt = <1975000>; 204 regulator-boot-on; 205 regulator-always-on; 206 }; 207 208 sw3b_reg: sw3b { 209 regulator-min-microvolt = <400000>; 210 regulator-max-microvolt = <1975000>; 211 regulator-boot-on; 212 regulator-always-on; 213 }; 214 215 swbst_reg: swbst { 216 regulator-min-microvolt = <5000000>; 217 regulator-max-microvolt = <5150000>; 218 }; 219 220 vgen1_reg: vgen1 { 221 regulator-min-microvolt = <800000>; 222 regulator-max-microvolt = <1550000>; 223 }; 224 225 vgen2_reg: vgen2 { 226 regulator-min-microvolt = <800000>; 227 regulator-max-microvolt = <1550000>; 228 }; 229 230 vgen3_reg: vgen3 { 231 regulator-min-microvolt = <1800000>; 232 regulator-max-microvolt = <3300000>; 233 regulator-always-on; 234 }; 235 236 vgen4_reg: vgen4 { 237 regulator-min-microvolt = <1800000>; 238 regulator-max-microvolt = <3300000>; 239 regulator-always-on; 240 }; 241 242 vgen5_reg: vgen5 { 243 regulator-min-microvolt = <1800000>; 244 regulator-max-microvolt = <3300000>; 245 regulator-always-on; 246 }; 247 248 vgen6_reg: vgen6 { 249 regulator-min-microvolt = <1800000>; 250 regulator-max-microvolt = <3300000>; 251 regulator-always-on; 252 }; 253 254 vref_reg: vrefddr { 255 regulator-boot-on; 256 regulator-always-on; 257 }; 258 259 vsnvs_reg: vsnvs { 260 regulator-min-microvolt = <1000000>; 261 regulator-max-microvolt = <3000000>; 262 regulator-boot-on; 263 regulator-always-on; 264 }; 265 }; 266 }; 267 268 leds: led-controller@30 { 269 compatible = "ti,lp5562"; 270 reg = <0x30>; 271 clock-mode = /bits/ 8 <1>; 272 status = "disabled"; 273 #address-cells = <1>; 274 #size-cells = <0>; 275 276 chan@0 { 277 chan-name = "R"; 278 led-cur = /bits/ 8 <0x20>; 279 max-cur = /bits/ 8 <0x60>; 280 reg = <0>; 281 color = <LED_COLOR_ID_RED>; 282 }; 283 284 chan@1 { 285 chan-name = "G"; 286 led-cur = /bits/ 8 <0x20>; 287 max-cur = /bits/ 8 <0x60>; 288 reg = <1>; 289 color = <LED_COLOR_ID_GREEN>; 290 }; 291 292 chan@2 { 293 chan-name = "B"; 294 led-cur = /bits/ 8 <0x20>; 295 max-cur = /bits/ 8 <0x60>; 296 reg = <2>; 297 color = <LED_COLOR_ID_BLUE>; 298 }; 299 }; 300 301 eeprom@57 { 302 compatible = "atmel,24c128"; 303 reg = <0x57>; 304 pagesize = <64>; 305 status = "okay"; 306 }; 307 308 touchscreen: touchscreen@5c { 309 compatible = "pixcir,pixcir_tangoc"; 310 reg = <0x5c>; 311 pinctrl-0 = <&pinctrl_touch>; 312 interrupt-parent = <&gpio4>; 313 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 314 attb-gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>; 315 reset-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; 316 touchscreen-size-x = <800>; 317 touchscreen-size-y = <480>; 318 status = "disabled"; 319 }; 320 }; 321 322 &i2c3 { 323 clock-frequency = <100000>; 324 pinctrl-names = "default"; 325 pinctrl-0 = <&pinctrl_i2c3>; 326 status = "okay"; 327 328 oled_1309: oled@3c { 329 compatible = "solomon,ssd1309fb-i2c"; 330 reg = <0x3c>; 331 solomon,height = <64>; 332 solomon,width = <128>; 333 solomon,page-offset = <0>; 334 solomon,segment-no-remap; 335 solomon,prechargep2 = <15>; 336 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>; 337 vbat-supply = <&sw2_reg>; 338 status = "disabled"; 339 }; 340 341 oled_1305: oled@3d { 342 compatible = "solomon,ssd1305fb-i2c"; 343 reg = <0x3d>; 344 solomon,height = <64>; 345 solomon,width = <128>; 346 solomon,page-offset = <0>; 347 solomon,col-offset = <4>; 348 solomon,prechargep2 = <15>; 349 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>; 350 vbat-supply = <&sw2_reg>; 351 status = "disabled"; 352 }; 353 354 gpio_oled: gpio@41 { 355 compatible = "nxp,pca9536"; 356 gpio-controller; 357 #gpio-cells = <2>; 358 reg = <0x41>; 359 vcc-supply = <&sw2_reg>; 360 status = "disabled"; 361 }; 362 363 touchkeys: keys@5a { 364 compatible = "fsl,mpr121-touchkey"; 365 reg = <0x5a>; 366 vdd-supply = <&sw2_reg>; 367 autorepeat; 368 linux,keycodes = <KEY_1>, <KEY_2>, <KEY_3>, <KEY_4>, <KEY_5>, 369 <KEY_6>, <KEY_7>, <KEY_8>, <KEY_9>, 370 <KEY_BACKSPACE>, <KEY_0>, <KEY_ENTER>; 371 poll-interval = <50>; 372 status = "disabled"; 373 }; 374 }; 375 376 &iomuxc { 377 pinctrl_enet: enetgrp { 378 fsl,pins = < 379 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b020 380 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b020 381 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020 382 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b020 383 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b020 384 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b020 385 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b020 386 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b020 387 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b020 388 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b020 389 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b020 390 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b020 391 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b020 392 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b020 393 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b010 394 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b010 395 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b098 396 >; 397 }; 398 399 pinctrl_hdmi_cec: hdmicecgrp { 400 fsl,pins = < 401 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1b898 402 >; 403 }; 404 405 pinctrl_i2c2: i2c2grp { 406 fsl,pins = < 407 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b899 408 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b899 409 >; 410 }; 411 412 pinctrl_i2c3: i2c3grp { 413 fsl,pins = < 414 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b899 415 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899 416 >; 417 }; 418 419 pinctrl_ipu1: ipu1grp { 420 fsl,pins = < 421 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 422 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 423 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 424 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 425 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 426 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 427 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 428 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 429 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 430 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 431 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 432 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 433 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 434 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 435 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 436 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 437 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 438 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 439 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 440 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 441 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 442 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 443 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 444 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 445 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 446 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 447 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 448 >; 449 }; 450 451 pinctrl_pcie: pciegrp { 452 fsl,pins = < 453 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b098 454 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b098 455 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b098 456 >; 457 }; 458 459 pinctrl_pcie_reg: pciereggrp { 460 fsl,pins = < 461 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b098 462 >; 463 }; 464 465 pinctrl_pmic: pmicgrp { 466 fsl,pins = < 467 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b098 468 >; 469 }; 470 471 pinctrl_pwm1: pwm1grp { 472 fsl,pins = < 473 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8 474 >; 475 }; 476 477 pinctrl_touch: touchgrp { 478 fsl,pins = < 479 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b098 480 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b098 481 >; 482 }; 483 484 pinctrl_uart1: uart1grp { 485 fsl,pins = < 486 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0a8 487 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0a8 488 >; 489 }; 490 491 pinctrl_uart2: uart2grp { 492 fsl,pins = < 493 MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b098 494 MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b098 495 >; 496 }; 497 498 pinctrl_usbh1: usbh1grp { 499 fsl,pins = < 500 MX6QDL_PAD_EIM_D30__USB_H1_OC 0x1b098 501 >; 502 }; 503 504 pinctrl_usbh1_vbus: usbh1-vbus { 505 fsl,pins = < 506 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x98 507 >; 508 }; 509 510 pinctrl_usbotg: usbotggrp { 511 fsl,pins = < 512 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1b098 513 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b098 514 >; 515 }; 516 517 pinctrl_usbotg_vbus: usbotg-vbus { 518 fsl,pins = < 519 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x98 520 >; 521 }; 522 523 pinctrl_usdhc3: usdhc3grp { 524 fsl,pins = < 525 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b018 526 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b018 527 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 528 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 529 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 530 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 531 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 532 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 533 >; 534 }; 535 536 pinctrl_usdhc4: usdhc4grp { 537 fsl,pins = < 538 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x1f069 539 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10069 540 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17069 541 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17069 542 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17069 543 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17069 544 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17069 545 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17069 546 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17069 547 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17069 548 >; 549 }; 550 551 pinctrl_wdog: wdoggrp { 552 fsl,pins = < 553 MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0 554 >; 555 }; 556 }; 557 558 &ipu1_di0_disp0 { 559 remote-endpoint = <&lcd_display_in>; 560 }; 561 562 &pcie { 563 pinctrl-names = "default"; 564 pinctrl-0 = <&pinctrl_pcie>; 565 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; 566 vpcie-supply = <®_pcie>; 567 status = "disabled"; 568 }; 569 570 &pwm1 { 571 pinctrl-names = "default"; 572 pinctrl-0 = <&pinctrl_pwm1>; 573 status = "disabled"; 574 }; 575 576 &uart1 { 577 pinctrl-names = "default"; 578 pinctrl-0 = <&pinctrl_uart1>; 579 status = "okay"; 580 }; 581 582 &uart2 { 583 pinctrl-names = "default"; 584 pinctrl-0 = <&pinctrl_uart2>; 585 status = "okay"; 586 }; 587 588 &usbh1 { 589 pinctrl-names = "default"; 590 pinctrl-0 = <&pinctrl_usbh1>; 591 vbus-supply = <®_usb_h1_vbus>; 592 over-current-active-low; 593 status = "disabled"; 594 }; 595 596 &usbotg { 597 pinctrl-names = "default"; 598 pinctrl-0 = <&pinctrl_usbotg>; 599 vbus-supply = <®_usb_otg_vbus>; 600 over-current-active-low; 601 srp-disable; 602 hnp-disable; 603 adp-disable; 604 status = "okay"; 605 }; 606 607 &usbphy1 { 608 fsl,tx-d-cal = <106>; 609 status = "okay"; 610 }; 611 612 &usbphy2 { 613 fsl,tx-d-cal = <109>; 614 status = "disabled"; 615 }; 616 617 &usdhc3 { 618 pinctrl-names = "default"; 619 pinctrl-0 = <&pinctrl_usdhc3>; 620 bus-width = <4>; 621 cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>; 622 wp-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; 623 no-1-8-v; 624 keep-power-in-suspend; 625 wakeup-source; 626 vmmc-supply = <&sw2_reg>; 627 status = "disabled"; 628 }; 629 630 &usdhc4 { 631 pinctrl-names = "default"; 632 pinctrl-0 = <&pinctrl_usdhc4>; 633 bus-width = <8>; 634 non-removable; 635 no-1-8-v; 636 keep-power-in-suspend; 637 vmmc-supply = <&sw2_reg>; 638 status = "okay"; 639 }; 640 641 &wdog1 { 642 status = "disabled"; 643 }; 644 645 &wdog2 { 646 pinctrl-names = "default"; 647 pinctrl-0 = <&pinctrl_wdog>; 648 fsl,ext-reset-output; 649 status = "okay"; 650 };
Cache object: 4721025be168423f82894b3e965f81cf
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