1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /*
3 * Copyright 2014-2022 Toradex
4 * Copyright 2012 Freescale Semiconductor, Inc.
5 * Copyright 2011 Linaro Ltd.
6 */
7
8 /dts-v1/;
9
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include "imx6q.dtsi"
14 #include "imx6qdl-apalis.dtsi"
15
16 / {
17 model = "Toradex Apalis iMX6Q/D Module on Apalis Evaluation Board";
18 compatible = "toradex,apalis_imx6q-eval", "toradex,apalis_imx6q",
19 "fsl,imx6q";
20
21 aliases {
22 i2c0 = &i2c1;
23 i2c1 = &i2c3;
24 i2c2 = &i2c2;
25 rtc0 = &rtc_i2c;
26 rtc1 = &snvs_rtc;
27 };
28
29 chosen {
30 stdout-path = "serial0:115200n8";
31 };
32
33 reg_pcie_switch: regulator-pcie-switch {
34 compatible = "regulator-fixed";
35 enable-active-high;
36 gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
37 regulator-max-microvolt = <1800000>;
38 regulator-min-microvolt = <1800000>;
39 regulator-name = "pcie_switch";
40 startup-delay-us = <100000>;
41 status = "okay";
42 };
43
44 reg_3v3_sw: regulator-3v3-sw {
45 compatible = "regulator-fixed";
46 regulator-always-on;
47 regulator-max-microvolt = <3300000>;
48 regulator-min-microvolt = <3300000>;
49 regulator-name = "3.3V_SW";
50 };
51 };
52
53 &can1 {
54 xceiver-supply = <®_3v3_sw>;
55 status = "okay";
56 };
57
58 &can2 {
59 xceiver-supply = <®_3v3_sw>;
60 status = "okay";
61 };
62
63 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
64 &i2c1 {
65 status = "okay";
66
67 pcie-switch@58 {
68 compatible = "plx,pex8605";
69 reg = <0x58>;
70 };
71
72 /* M41T0M6 real time clock on carrier board */
73 rtc_i2c: rtc@68 {
74 compatible = "st,m41t0";
75 reg = <0x68>;
76 };
77 };
78
79 /*
80 * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
81 * board)
82 */
83 &i2c3 {
84 status = "okay";
85 };
86
87 &pcie {
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_reset_moci>;
90 /* active-high meaning opposite of regular PERST# active-low polarity */
91 reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
92 reset-gpio-active-high;
93 vpcie-supply = <®_pcie_switch>;
94 status = "okay";
95 };
96
97 &pwm1 {
98 status = "okay";
99 };
100
101 &pwm2 {
102 status = "okay";
103 };
104
105 &pwm3 {
106 status = "okay";
107 };
108
109 &pwm4 {
110 status = "okay";
111 };
112
113 ®_usb_host_vbus {
114 status = "okay";
115 };
116
117 ®_usb_otg_vbus {
118 status = "okay";
119 };
120
121 &sata {
122 status = "okay";
123 };
124
125 &sound_spdif {
126 status = "okay";
127 };
128
129 &spdif {
130 status = "okay";
131 };
132
133 &uart1 {
134 status = "okay";
135 };
136
137 &uart2 {
138 status = "okay";
139 };
140
141 &uart4 {
142 status = "okay";
143 };
144
145 &uart5 {
146 status = "okay";
147 };
148
149 &usbh1 {
150 vbus-supply = <®_usb_host_vbus>;
151 status = "okay";
152 };
153
154 &usbotg {
155 vbus-supply = <®_usb_otg_vbus>;
156 status = "okay";
157 };
158
159 /* MMC1 */
160 &usdhc1 {
161 status = "okay";
162 };
163
164 /* SD1 */
165 &usdhc2 {
166 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>;
169 status = "okay";
170 };
Cache object: 4f9b806d41043a403887768007ee07d6
|