The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/imx6q-dhcom-som.dtsi

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    1 // SPDX-License-Identifier: (GPL-2.0+)
    2 /*
    3  * Copyright (C) 2015 DH electronics GmbH
    4  * Copyright (C) 2018 Marek Vasut <marex@denx.de>
    5  */
    6 
    7 #include "imx6q.dtsi"
    8 #include <dt-bindings/pwm/pwm.h>
    9 #include <dt-bindings/gpio/gpio.h>
   10 #include <dt-bindings/clock/imx6qdl-clock.h>
   11 #include <dt-bindings/input/input.h>
   12 
   13 / {
   14         aliases {
   15                 i2c0 = &i2c2;
   16                 i2c1 = &i2c1;
   17                 i2c2 = &i2c3;
   18                 mmc0 = &usdhc2;
   19                 mmc1 = &usdhc3;
   20                 mmc2 = &usdhc4;
   21                 mmc3 = &usdhc1;
   22                 rtc0 = &rtc_i2c;
   23                 rtc1 = &snvs_rtc;
   24                 serial0 = &uart1;
   25                 serial1 = &uart5;
   26                 serial2 = &uart4;
   27                 serial3 = &uart2;
   28                 serial4 = &uart3;
   29         };
   30 
   31         memory@10000000 {
   32                 device_type = "memory";
   33                 reg = <0x10000000 0x40000000>;
   34         };
   35 
   36         reg_eth_vio: regulator-eth-vio {
   37                 compatible = "regulator-fixed";
   38                 gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
   39                 pinctrl-0 = <&pinctrl_enet_vio>;
   40                 pinctrl-names = "default";
   41                 regulator-always-on;
   42                 regulator-boot-on;
   43                 regulator-min-microvolt = <3300000>;
   44                 regulator-max-microvolt = <3300000>;
   45                 regulator-name = "eth_vio";
   46                 vin-supply = <&sw2_reg>;
   47         };
   48 
   49         reg_usb_otg_vbus: regulator-usb-otg-vbus {
   50                 compatible = "regulator-fixed";
   51                 regulator-name = "usb_otg_vbus";
   52                 regulator-min-microvolt = <5000000>;
   53                 regulator-max-microvolt = <5000000>;
   54         };
   55 
   56         reg_usb_h1_vbus: regulator-usb-h1-vbus {
   57                 compatible = "regulator-fixed";
   58                 regulator-name = "usb_h1_vbus";
   59                 regulator-min-microvolt = <5000000>;
   60                 regulator-max-microvolt = <5000000>;
   61                 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
   62                 enable-active-high;
   63         };
   64 
   65         reg_3p3v: regulator-3P3V {
   66                 compatible = "regulator-fixed";
   67                 regulator-name = "3P3V";
   68                 regulator-min-microvolt = <3300000>;
   69                 regulator-max-microvolt = <3300000>;
   70                 regulator-always-on;
   71         };
   72 };
   73 
   74 &can1 {
   75         pinctrl-names = "default";
   76         pinctrl-0 = <&pinctrl_flexcan1>;
   77 };
   78 
   79 &can2 {
   80         pinctrl-names = "default";
   81         pinctrl-0 = <&pinctrl_flexcan2>;
   82 };
   83 
   84 &ecspi1 {
   85         cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio4 11 GPIO_ACTIVE_LOW>;
   86         pinctrl-names = "default";
   87         pinctrl-0 = <&pinctrl_ecspi1>;
   88         status = "okay";
   89 
   90         flash@0 {       /* S25FL116K */
   91                 #address-cells = <1>;
   92                 #size-cells = <1>;
   93                 compatible = "jedec,spi-nor";
   94                 spi-max-frequency = <50000000>;
   95                 reg = <0>;
   96                 m25p,fast-read;
   97         };
   98 };
   99 
  100 &ecspi2 {
  101         cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
  102         pinctrl-names = "default";
  103         pinctrl-0 = <&pinctrl_ecspi2>;
  104         status = "okay";
  105 };
  106 
  107 &fec {
  108         pinctrl-names = "default";
  109         pinctrl-0 = <&pinctrl_enet_100M>;
  110         phy-mode = "rmii";
  111         phy-handle = <&ethphy0>;
  112         status = "okay";
  113 
  114         mdio {
  115                 #address-cells = <1>;
  116                 #size-cells = <0>;
  117 
  118                 ethphy0: ethernet-phy@0 {       /* SMSC LAN8710Ai */
  119                         reg = <0>;
  120                         max-speed = <100>;
  121                         reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
  122                         reset-assert-us = <1000>;
  123                         reset-deassert-us = <1000>;
  124                         smsc,disable-energy-detect; /* Make plugin detection reliable */
  125                 };
  126         };
  127 };
  128 
  129 &i2c1 {
  130         clock-frequency = <100000>;
  131         pinctrl-names = "default", "gpio";
  132         pinctrl-0 = <&pinctrl_i2c1>;
  133         pinctrl-1 = <&pinctrl_i2c1_gpio>;
  134         scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  135         sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  136         status = "okay";
  137 };
  138 
  139 &i2c2 {
  140         clock-frequency = <100000>;
  141         pinctrl-names = "default", "gpio";
  142         pinctrl-0 = <&pinctrl_i2c2>;
  143         pinctrl-1 = <&pinctrl_i2c2_gpio>;
  144         scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  145         sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  146         status = "okay";
  147 };
  148 
  149 &i2c3 {
  150         clock-frequency = <100000>;
  151         pinctrl-names = "default", "gpio";
  152         pinctrl-0 = <&pinctrl_i2c3>;
  153         pinctrl-1 = <&pinctrl_i2c3_gpio>;
  154         scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  155         sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  156         status = "okay";
  157 
  158         ltc3676: pmic@3c {
  159                 compatible = "lltc,ltc3676";
  160                 pinctrl-names = "default";
  161                 pinctrl-0 = <&pinctrl_pmic_hw300>;
  162                 reg = <0x3c>;
  163                 interrupt-parent = <&gpio5>;
  164                 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
  165 
  166                 regulators {
  167                         sw1_reg: sw1 {
  168                                 regulator-min-microvolt = <787500>;
  169                                 regulator-max-microvolt = <1527272>;
  170                                 lltc,fb-voltage-divider = <100000 110000>;
  171                                 regulator-suspend-mem-microvolt = <1040000>;
  172                                 regulator-ramp-delay = <7000>;
  173                                 regulator-boot-on;
  174                                 regulator-always-on;
  175                         };
  176 
  177                         sw2_reg: sw2 {
  178                                 regulator-min-microvolt = <1885714>;
  179                                 regulator-max-microvolt = <3657142>;
  180                                 lltc,fb-voltage-divider = <100000 28000>;
  181                                 regulator-ramp-delay = <7000>;
  182                                 regulator-boot-on;
  183                                 regulator-always-on;
  184                         };
  185 
  186                         sw3_reg: sw3 {
  187                                 regulator-min-microvolt = <787500>;
  188                                 regulator-max-microvolt = <1527272>;
  189                                 lltc,fb-voltage-divider = <100000 110000>;
  190                                 regulator-suspend-mem-microvolt = <980000>;
  191                                 regulator-ramp-delay = <7000>;
  192                                 regulator-boot-on;
  193                                 regulator-always-on;
  194                         };
  195 
  196                         sw4_reg: sw4 {
  197                                 regulator-min-microvolt = <855571>;
  198                                 regulator-max-microvolt = <1659291>;
  199                                 lltc,fb-voltage-divider = <100000 93100>;
  200                                 regulator-ramp-delay = <7000>;
  201                                 regulator-boot-on;
  202                                 regulator-always-on;
  203                         };
  204 
  205                         ldo1_reg: ldo1 {
  206                                 regulator-min-microvolt = <3240306>;
  207                                 regulator-max-microvolt = <3240306>;
  208                                 lltc,fb-voltage-divider = <102000 29400>;
  209                                 regulator-boot-on;
  210                                 regulator-always-on;
  211                         };
  212 
  213                         ldo2_reg: ldo2 {
  214                                 regulator-min-microvolt = <2484708>;
  215                                 regulator-max-microvolt = <2484708>;
  216                                 lltc,fb-voltage-divider = <100000 41200>;
  217                                 regulator-boot-on;
  218                                 regulator-always-on;
  219                         };
  220                 };
  221         };
  222 
  223         touchscreen@49 {        /* TSC2004 */
  224                 compatible = "ti,tsc2004";
  225                 reg = <0x49>;
  226                 vio-supply = <&reg_3p3v>;
  227                 pinctrl-names = "default";
  228                 pinctrl-0 = <&pinctrl_tsc2004_hw300>;
  229                 interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
  230                 status = "disabled";
  231         };
  232 
  233         eeprom@50 {
  234                 compatible = "atmel,24c02";
  235                 reg = <0x50>;
  236                 pagesize = <16>;
  237         };
  238 
  239         rtc_i2c: rtc@56 {
  240                 compatible = "microcrystal,rv3029";
  241                 pinctrl-names = "default";
  242                 pinctrl-0 = <&pinctrl_rtc_hw300>;
  243                 reg = <0x56>;
  244                 interrupt-parent = <&gpio7>;
  245                 interrupts = <12 2>;
  246         };
  247 };
  248 
  249 &iomuxc {
  250         pinctrl-names = "default";
  251         pinctrl-0 = <&pinctrl_hog_base>;
  252 
  253         pinctrl_hog_base: hog-base-grp {
  254                 fsl,pins = <
  255                         MX6QDL_PAD_EIM_A19__GPIO2_IO19          0x120b0
  256                         MX6QDL_PAD_EIM_A23__GPIO6_IO06          0x120b0
  257                         MX6QDL_PAD_EIM_A22__GPIO2_IO16          0x120b0
  258                         MX6QDL_PAD_EIM_A16__GPIO2_IO22          0x120b0
  259                         MX6QDL_PAD_EIM_A17__GPIO2_IO21          0x120b0
  260                 >;
  261         };
  262 
  263         pinctrl_ecspi1: ecspi1-grp {
  264                 fsl,pins = <
  265                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
  266                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
  267                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
  268                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
  269                         MX6QDL_PAD_KEY_ROW2__GPIO4_IO11         0x1b0b0
  270                 >;
  271         };
  272 
  273         pinctrl_ecspi2: ecspi2-grp {
  274                 fsl,pins = <
  275                         MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO      0x100b1
  276                         MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI       0x100b1
  277                         MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK       0x100b1
  278                         MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29       0x1b0b0
  279                 >;
  280         };
  281 
  282         pinctrl_enet_100M: enet-100M-grp {
  283                 fsl,pins = <
  284                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
  285                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
  286                         MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN      0x1b0b0
  287                         MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER       0x1b0b0
  288                         MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0     0x1b0b0
  289                         MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1     0x1b0b0
  290                         MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0
  291                         MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0     0x1b0b0
  292                         MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1     0x1b0b0
  293                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
  294                         MX6QDL_PAD_EIM_WAIT__GPIO5_IO00         0x000b0
  295                         MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x000b1
  296                 >;
  297         };
  298 
  299         pinctrl_enet_vio: enet-vio-grp {
  300                 fsl,pins = <
  301                         MX6QDL_PAD_GPIO_7__GPIO1_IO07           0x120b0
  302                 >;
  303         };
  304 
  305         pinctrl_flexcan1: flexcan1-grp {
  306                 fsl,pins = <
  307                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b0
  308                         MX6QDL_PAD_GPIO_8__FLEXCAN1_RX          0x1b0b0
  309                 >;
  310         };
  311 
  312         pinctrl_flexcan2: flexcan2-grp {
  313                 fsl,pins = <
  314                         MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX        0x1b0b0
  315                         MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX        0x1b0b0
  316                 >;
  317         };
  318 
  319         pinctrl_i2c1: i2c1-grp {
  320                 fsl,pins = <
  321                         MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
  322                         MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
  323                 >;
  324         };
  325 
  326         pinctrl_i2c1_gpio: i2c1-gpio-grp {
  327                 fsl,pins = <
  328                         MX6QDL_PAD_EIM_D21__GPIO3_IO21          0x4001b8b1
  329                         MX6QDL_PAD_EIM_D28__GPIO3_IO28          0x4001b8b1
  330                 >;
  331         };
  332 
  333         pinctrl_i2c2: i2c2-grp {
  334                 fsl,pins = <
  335                         MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
  336                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
  337                 >;
  338         };
  339 
  340         pinctrl_i2c2_gpio: i2c2-gpio-grp {
  341                 fsl,pins = <
  342                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12         0x4001b8b1
  343                         MX6QDL_PAD_KEY_ROW3__GPIO4_IO13         0x4001b8b1
  344                 >;
  345         };
  346 
  347         pinctrl_i2c3: i2c3-grp {
  348                 fsl,pins = <
  349                         MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
  350                         MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
  351                 >;
  352         };
  353 
  354         pinctrl_i2c3_gpio: i2c3-gpio-grp {
  355                 fsl,pins = <
  356                         MX6QDL_PAD_GPIO_3__GPIO1_IO03           0x4001b8b1
  357                         MX6QDL_PAD_GPIO_6__GPIO1_IO06           0x4001b8b1
  358                 >;
  359         };
  360 
  361         pinctrl_pmic_hw300: pmic-hw300-grp {
  362                 fsl,pins = <
  363                         MX6QDL_PAD_EIM_A25__GPIO5_IO02          0x1B0B0
  364                 >;
  365         };
  366 
  367         pinctrl_rtc_hw300: rtc-hw300-grp {
  368                 fsl,pins = <
  369                         MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x120B0
  370                 >;
  371         };
  372 
  373         pinctrl_tsc2004_hw300: tsc2004-hw300-grp {
  374                 fsl,pins = <
  375                         MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x120B0
  376                 >;
  377         };
  378 
  379         pinctrl_uart1: uart1-grp {
  380                 fsl,pins = <
  381                         MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
  382                         MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
  383                         MX6QDL_PAD_EIM_D20__UART1_RTS_B         0x1b0b1
  384                         MX6QDL_PAD_EIM_D19__UART1_CTS_B         0x4001b0b1
  385                         MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x4001b0b1
  386                         MX6QDL_PAD_EIM_D24__GPIO3_IO24          0x4001b0b1
  387                         MX6QDL_PAD_EIM_D25__GPIO3_IO25          0x4001b0b1
  388                         MX6QDL_PAD_EIM_EB3__GPIO2_IO31          0x4001b0b1
  389                 >;
  390         };
  391 
  392         pinctrl_uart4: uart4-grp {
  393                 fsl,pins = <
  394                         MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA    0x1b0b1
  395                         MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA    0x1b0b1
  396                 >;
  397         };
  398 
  399         pinctrl_uart5: uart5-grp {
  400                 fsl,pins = <
  401                         MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA    0x1b0b1
  402                         MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA    0x1b0b1
  403                         MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B      0x1b0b1
  404                         MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B      0x4001b0b1
  405                 >;
  406         };
  407 
  408         pinctrl_usbh1: usbh1-grp {
  409                 fsl,pins = <
  410                         MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x120B0
  411                 >;
  412         };
  413 
  414         pinctrl_usbotg: usbotg-grp {
  415                 fsl,pins = <
  416                         MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
  417                 >;
  418         };
  419 
  420         pinctrl_usdhc2: usdhc2-grp {
  421                 fsl,pins = <
  422                         MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
  423                         MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
  424                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
  425                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
  426                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
  427                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
  428                         MX6QDL_PAD_NANDF_CS3__GPIO6_IO16        0x120B0
  429                 >;
  430         };
  431 
  432         pinctrl_usdhc3: usdhc3-grp {
  433                 fsl,pins = <
  434                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
  435                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
  436                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
  437                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
  438                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
  439                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
  440                         MX6QDL_PAD_SD3_RST__GPIO7_IO08          0x120B0
  441                 >;
  442         };
  443 
  444         pinctrl_usdhc4: usdhc4-grp {
  445                 fsl,pins = <
  446                         MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
  447                         MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
  448                         MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
  449                         MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
  450                         MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
  451                         MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
  452                         MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
  453                         MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
  454                         MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
  455                         MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
  456                 >;
  457         };
  458 };
  459 
  460 &reg_arm {
  461         vin-supply = <&sw3_reg>;
  462 };
  463 
  464 &reg_soc {
  465         vin-supply = <&sw1_reg>;
  466 };
  467 
  468 &reg_pu {
  469         vin-supply = <&sw1_reg>;
  470 };
  471 
  472 &reg_vdd1p1 {
  473         vin-supply = <&sw2_reg>;
  474 };
  475 
  476 &reg_vdd2p5 {
  477         vin-supply = <&sw2_reg>;
  478 };
  479 
  480 &uart1 {
  481         pinctrl-names = "default";
  482         pinctrl-0 = <&pinctrl_uart1>;
  483         uart-has-rtscts;
  484         dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
  485         dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
  486         dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
  487         rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
  488         status = "okay";
  489 };
  490 
  491 &uart4 {
  492         pinctrl-names = "default";
  493         pinctrl-0 = <&pinctrl_uart4>;
  494         status = "okay";
  495 };
  496 
  497 &uart5 {
  498         pinctrl-names = "default";
  499         pinctrl-0 = <&pinctrl_uart5>;
  500         uart-has-rtscts;
  501         status = "okay";
  502 };
  503 
  504 &usbh1 {
  505         pinctrl-names = "default";
  506         pinctrl-0 = <&pinctrl_usbh1>;
  507         vbus-supply = <&reg_usb_h1_vbus>;
  508         dr_mode = "host";
  509         status = "okay";
  510 };
  511 
  512 &usbotg {
  513         vbus-supply = <&reg_usb_otg_vbus>;
  514         pinctrl-names = "default";
  515         pinctrl-0 = <&pinctrl_usbotg>;
  516         disable-over-current;
  517         dr_mode = "otg";
  518         status = "okay";
  519 };
  520 
  521 &usdhc2 {
  522         pinctrl-names = "default";
  523         pinctrl-0 = <&pinctrl_usdhc2>;
  524         cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
  525         keep-power-in-suspend;
  526         status = "okay";
  527 };
  528 
  529 &usdhc3 {
  530         pinctrl-names = "default";
  531         pinctrl-0 = <&pinctrl_usdhc3>;
  532         cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
  533         fsl,wp-controller;
  534         keep-power-in-suspend;
  535         status = "disabled";
  536 };
  537 
  538 &usdhc4 {
  539         pinctrl-names = "default";
  540         pinctrl-0 = <&pinctrl_usdhc4>;
  541         non-removable;
  542         bus-width = <8>;
  543         no-1-8-v;
  544         keep-power-in-suspend;
  545         status = "okay";
  546 };

Cache object: 8a87db621073768ef7283baa0988060e


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