The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/imx6qdl-tqma6.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0-or-later
    2 /*
    3  * Copyright 2013 Sascha Hauer, Pengutronix
    4  * Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
    5  */
    6 
    7 #include <dt-bindings/gpio/gpio.h>
    8 #include <dt-bindings/interrupt-controller/irq.h>
    9 
   10 / {
   11         reg_3p3v: regulator-3p3v {
   12                 compatible = "regulator-fixed";
   13                 regulator-name = "supply-3p3v";
   14                 regulator-min-microvolt = <3300000>;
   15                 regulator-max-microvolt = <3300000>;
   16                 regulator-always-on;
   17         };
   18 };
   19 
   20 &ecspi1 {
   21         pinctrl-names = "default";
   22         pinctrl-0 = <&pinctrl_ecspi1>;
   23         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
   24         status = "okay";
   25 
   26         m25p80: flash@0 {
   27                 compatible = "jedec,spi-nor";
   28                 spi-max-frequency = <50000000>;
   29                 reg = <0>;
   30                 #address-cells = <1>;
   31                 #size-cells = <1>;
   32                 m25p,fast-read;
   33         };
   34 };
   35 
   36 &iomuxc {
   37         pinctrl_ecspi1: ecspi1grp {
   38                 fsl,pins = <
   39                         /* HYS, SPEED = MED, 100k up, DSE = 011, SRE_FAST */
   40                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b099
   41                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0xb099
   42                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0xb099
   43                          /* eCSPI1 SS1 */
   44                         MX6QDL_PAD_EIM_D19__GPIO3_IO19 0xb099
   45                 >;
   46         };
   47 
   48         pinctrl_i2c1: i2c1grp {
   49                 fsl,pins = <
   50                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b899
   51                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b899
   52                 >;
   53         };
   54 
   55         pinctrl_i2c1_recovery: i2c1recoverygrp {
   56                 fsl,pins = <
   57                         MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b899
   58                         MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x4001b899
   59                 >;
   60         };
   61 
   62         pinctrl_i2c3: i2c3grp {
   63                 fsl,pins = <
   64                         MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b899
   65                         MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899
   66                 >;
   67         };
   68 
   69         pinctrl_i2c3_recovery: i2c3recoverygrp {
   70                 fsl,pins = <
   71                         MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x4001b899
   72                         MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b899
   73                 >;
   74         };
   75 
   76         pinctrl_pmic: pmicgrp {
   77                 fsl,pins = <
   78                         MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b099 /* PMIC irq */
   79                 >;
   80         };
   81 
   82         pinctrl_usdhc3: usdhc3grp {
   83                 fsl,pins = <
   84                         MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
   85                         MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
   86                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
   87                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
   88                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
   89                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
   90                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
   91                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
   92                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
   93                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
   94                 >;
   95         };
   96 };
   97 
   98 &pmic {
   99         pinctrl-names = "default";
  100         pinctrl-0 = <&pinctrl_pmic>;
  101         interrupt-parent = <&gpio6>;
  102         interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
  103 
  104         regulators {
  105                 reg_vddcore: sw1ab {
  106                         regulator-min-microvolt = <300000>;
  107                         regulator-max-microvolt = <1875000>;
  108                         regulator-always-on;
  109                 };
  110 
  111                 reg_vddsoc: sw1c {
  112                         regulator-min-microvolt = <300000>;
  113                         regulator-max-microvolt = <1875000>;
  114                         regulator-always-on;
  115                 };
  116 
  117                 reg_gen_3v3: sw2 {
  118                         regulator-min-microvolt = <800000>;
  119                         regulator-max-microvolt = <3300000>;
  120                         regulator-always-on;
  121                 };
  122 
  123                 reg_ddr_1v5a: sw3a {
  124                         regulator-min-microvolt = <400000>;
  125                         regulator-max-microvolt = <1975000>;
  126                         regulator-always-on;
  127                 };
  128 
  129                 reg_ddr_1v5b: sw3b {
  130                         regulator-min-microvolt = <400000>;
  131                         regulator-max-microvolt = <1975000>;
  132                         regulator-always-on;
  133                 };
  134 
  135                 sw4_reg: sw4 {
  136                         regulator-min-microvolt = <800000>;
  137                         regulator-max-microvolt = <3300000>;
  138                         regulator-always-on;
  139                 };
  140 
  141                 reg_5v_600mA: swbst {
  142                         regulator-min-microvolt = <5000000>;
  143                         regulator-max-microvolt = <5150000>;
  144                         regulator-always-on;
  145                 };
  146 
  147                 reg_snvs_3v: vsnvs {
  148                         regulator-min-microvolt = <1500000>;
  149                         regulator-max-microvolt = <3000000>;
  150                         regulator-always-on;
  151                 };
  152 
  153                 reg_vrefddr: vrefddr {
  154                         regulator-boot-on;
  155                         regulator-always-on;
  156                 };
  157 
  158                 reg_vgen1_1v5: vgen1 {
  159                         regulator-min-microvolt = <800000>;
  160                         regulator-max-microvolt = <1550000>;
  161                         /* not used */
  162                 };
  163 
  164                 reg_vgen2_1v2_eth: vgen2 {
  165                         regulator-min-microvolt = <800000>;
  166                         regulator-max-microvolt = <1550000>;
  167                         regulator-always-on;
  168                 };
  169 
  170                 reg_vgen3_2v8: vgen3 {
  171                         regulator-min-microvolt = <1800000>;
  172                         regulator-max-microvolt = <3300000>;
  173                         regulator-always-on;
  174                 };
  175 
  176                 reg_vgen4_1v8: vgen4 {
  177                         regulator-min-microvolt = <1800000>;
  178                         regulator-max-microvolt = <3300000>;
  179                         regulator-always-on;
  180                 };
  181 
  182                 reg_vgen5_1v8_eth: vgen5 {
  183                         regulator-min-microvolt = <1800000>;
  184                         regulator-max-microvolt = <3300000>;
  185                         regulator-always-on;
  186                 };
  187 
  188                 reg_vgen6_3v3: vgen6 {
  189                         regulator-min-microvolt = <1800000>;
  190                         regulator-max-microvolt = <3300000>;
  191                         regulator-always-on;
  192                 };
  193         };
  194 };
  195 
  196 /* eMMC */
  197 &usdhc3 {
  198         pinctrl-names = "default";
  199         pinctrl-0 = <&pinctrl_usdhc3>;
  200         vmmc-supply = <&reg_3p3v>;
  201         non-removable;
  202         disable-wp;
  203         no-sd;
  204         no-sdio;
  205         bus-width = <8>;
  206         #address-cells = <1>;
  207         #size-cells = <0>;
  208         status = "okay";
  209 
  210         mmccard: mmccard@0 {
  211                 reg = <0>;
  212                 compatible = "mmc-card";
  213                 broken-hpi;
  214         };
  215 };

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