Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/imx6qdl-wandboard-revd1.dtsi
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Copyright 2013 Freescale Semiconductor, Inc. 4 // 5 // Author: Fabio Estevam <fabio.estevam@freescale.com> 6 7 #include "imx6qdl-wandboard.dtsi" 8 9 / { 10 reg_eth_phy: regulator-eth-phy { 11 compatible = "regulator-fixed"; 12 regulator-name = "ETH_PHY"; 13 regulator-min-microvolt = <3300000>; 14 regulator-max-microvolt = <3300000>; 15 gpio = <&gpio7 13 GPIO_ACTIVE_LOW>; 16 }; 17 }; 18 19 &hdmi { 20 ddc-i2c-bus = <&i2c2>; 21 status = "okay"; 22 }; 23 24 &i2c3 { 25 clock-frequency = <100000>; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_i2c3>; 28 status = "okay"; 29 30 pmic: pfuze100@8 { 31 compatible = "fsl,pfuze100"; 32 reg = <0x08>; 33 34 regulators { 35 sw1a_reg: sw1ab { 36 regulator-min-microvolt = <300000>; 37 regulator-max-microvolt = <1875000>; 38 regulator-boot-on; 39 regulator-always-on; 40 regulator-ramp-delay = <6250>; 41 }; 42 43 sw1c_reg: sw1c { 44 regulator-min-microvolt = <300000>; 45 regulator-max-microvolt = <1875000>; 46 regulator-boot-on; 47 regulator-always-on; 48 regulator-ramp-delay = <6250>; 49 }; 50 51 sw2_reg: sw2 { 52 regulator-min-microvolt = <800000>; 53 regulator-max-microvolt = <3300000>; 54 regulator-boot-on; 55 regulator-always-on; 56 regulator-ramp-delay = <6250>; 57 }; 58 59 sw3a_reg: sw3a { 60 regulator-min-microvolt = <400000>; 61 regulator-max-microvolt = <1975000>; 62 regulator-boot-on; 63 regulator-always-on; 64 }; 65 66 sw3b_reg: sw3b { 67 regulator-min-microvolt = <400000>; 68 regulator-max-microvolt = <1975000>; 69 regulator-boot-on; 70 regulator-always-on; 71 }; 72 73 sw4_reg: sw4 { 74 regulator-min-microvolt = <800000>; 75 regulator-max-microvolt = <3300000>; 76 }; 77 78 swbst_reg: swbst { 79 regulator-min-microvolt = <5000000>; 80 regulator-max-microvolt = <5150000>; 81 }; 82 83 snvs_reg: vsnvs { 84 regulator-min-microvolt = <1000000>; 85 regulator-max-microvolt = <3000000>; 86 regulator-boot-on; 87 regulator-always-on; 88 }; 89 90 vref_reg: vrefddr { 91 regulator-boot-on; 92 regulator-always-on; 93 }; 94 95 vgen1_reg: vgen1 { 96 regulator-min-microvolt = <800000>; 97 regulator-max-microvolt = <1550000>; 98 }; 99 100 vgen2_reg: vgen2 { 101 regulator-min-microvolt = <1500000>; 102 regulator-max-microvolt = <1500000>; 103 regulator-boot-on; 104 regulator-always-on; 105 }; 106 107 vgen3_reg: vgen3 { 108 regulator-min-microvolt = <1800000>; 109 regulator-max-microvolt = <3300000>; 110 regulator-always-on; 111 }; 112 113 vgen4_reg: vgen4 { 114 regulator-min-microvolt = <1800000>; 115 regulator-max-microvolt = <3300000>; 116 regulator-always-on; 117 }; 118 119 vgen5_reg: vgen5 { 120 regulator-min-microvolt = <1800000>; 121 regulator-max-microvolt = <3300000>; 122 regulator-always-on; 123 }; 124 125 vgen6_reg: vgen6 { 126 regulator-min-microvolt = <1800000>; 127 regulator-max-microvolt = <3300000>; 128 regulator-always-on; 129 }; 130 }; 131 }; 132 }; 133 134 &fec { 135 phy-supply = <®_eth_phy>; 136 status = "okay"; 137 }; 138 139 &iomuxc { 140 pinctrl-0 = <&pinctrl_hog>; 141 142 imx6qdl-wandboard { 143 pinctrl_hog: hoggrp { 144 fsl,pins = < 145 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USDHC1 CD */ 146 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */ 147 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f0b1 /* RGMII PHY reset */ 148 >; 149 }; 150 151 pinctrl_enet: enetgrp { 152 fsl,pins = < 153 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 154 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 155 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 156 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 157 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 158 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 159 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 160 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 161 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 162 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 163 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 164 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 165 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 166 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 167 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 168 >; 169 }; 170 171 pinctrl_i2c3: i2c3grp { 172 fsl,pins = < 173 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 174 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 175 >; 176 }; 177 178 pinctrl_spdif: spdifgrp { 179 fsl,pins = < 180 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 181 >; 182 }; 183 }; 184 }; 185 186 &usdhc2 { 187 pinctrl-names = "default"; 188 pinctrl-0 = <&pinctrl_usdhc2>; 189 bus-width = <4>; 190 no-1-8-v; 191 non-removable; 192 status = "okay"; 193 };
Cache object: 7910b45c17db4b18b7f6473e6a76b248
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]